• Title/Summary/Keyword: filter performance

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The study on scheme for train position detection based on GPS/DR (GPS/DR기반의 차상열차위치검지방안 연구)

  • Shin, Kyung-Ho;Joung, Eui-Jin;Lee, Jun-Ho
    • Proceedings of the KSR Conference
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    • 2006.11b
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    • pp.802-810
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    • 2006
  • For a thorough train control, the precise train position detection is necessarily required. The widely used current way for train position detection is the one of using track circuits. The track circuit has a simple structure, and has a high level of reliability. However trains can be detected only on track circuits, which have to be installed on all ground sections, and much amount of cost for its installation and maintenance is needed. In addition, for the track circuit, only discontinuous position detection is possible because of the features of the closed circuit loop configuration. As the recent advances in telecommunication technologies and high-tech vehicle-based control equipments, for the train position detection, the method to detect positions directly from on trains is being studied. Vehicle-based position detection method is to estimate train positions, speed, timing data continuously, and to use them as the control information. In this paper, the features of GPS navigation and DR navigation are analyzed, and the navigation filters are designed by constructing vehicle-based train position detection method by combining GPS navigation and DR navigation for their complementary cooperation, and by using kalman filter. The position estimation performance of the proposed method is also confirmed by simulations.

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Combustion of Diesel Particulate Matters under Mixed Catalyst System of Fuel-Borne Catalyst and Perovskite: Influence of Composition of Perovskite (La1-x A'xBO3: A' = K, Sr; 0 ≤ x ≤ 1; B = Fe, Cr, Mn) on Combustion Activity (Fuel-Borne Catalyst와 Perovskite로 구성된 복합촉매 시스템에 의한 디젤 탄소입자상 물질의 연소반응: 반응성능과 Perovskite 촉매조성 (La1-x A'xBO3: A' = K, Sr; 0 ≤ x ≤ 1; B = Fe, Cr, Mn)의 상관관계)

  • Lee, Dae-Won;Sung, Ju Young;Lee, Kwan-Young
    • Korean Chemical Engineering Research
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    • v.56 no.2
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    • pp.281-290
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    • 2018
  • As the internal combustion engine vehicles of high fuel efficiency and low emission are demanded, it becomes important to procure technologies for improving low-temperature performance of automotive catalyst systems. In this study, we showed that the combustion rate of diesel particulate matter is greatly enhanced at low temperature by applying fuel-borne catalyst and perovskite catalyst concurrently. It was tried to examine the correlation between elemental composition of perovskite catalyst and combustion activity of mixed catalyst system. To achieve this goal, we applied temperature-programmed oxidation technique in testing the combustion behavior of perovskite-mixed particulate matter bed which contained the element of fuel-borne catalyst or not. We tried to explain the synergetic action of two catalyst components by comparing the trends of concentrations of carbon dioxide and nitrogen oxide in temperature-programmed oxidation results.

Highly Reliable Fault Detection and Classification Algorithm for Induction Motors (유도전동기를 위한 고 신뢰성 고장 검출 및 분류 알고리즘 연구)

  • Hwang, Chul-Hee;Kang, Myeong-Su;Jung, Yong-Bum;Kim, Jong-Myon
    • The KIPS Transactions:PartB
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    • v.18B no.3
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    • pp.147-156
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    • 2011
  • This paper proposes a 3-stage (preprocessing, feature extraction, and classification) fault detection and classification algorithm for induction motors. In the first stage, a low-pass filter is used to remove noise components in the fault signal. In the second stage, a discrete cosine transform (DCT) and a statistical method are used to extract features of the fault signal. Finally, a back propagation neural network (BPNN) method is applied to classify the fault signal. To evaluate the performance of the proposed algorithm, we used one second long normal/abnormal vibration signals of an induction motor sampled at 8kHz. Experimental results showed that the proposed algorithm achieves about 100% accuracy in fault classification, and it provides 50% improved accuracy when compared to the existing fault detection algorithm using a cross-covariance method. In a real-world data acquisition environment, unnecessary noise components are usually included to the real signal. Thus, we conducted an additional simulation to evaluate how well the proposed algorithm classifies the fault signals in a circumstance where a white Gaussian noise is inserted into the fault signals. The simulation results showed that the proposed algorithm achieves over 98% accuracy in fault classification. Moreover, we developed a testbed system including a TI's DSP (digital signal processor) to implement and verify the functionality of the proposed algorithm.

Precise Orbit Determination of LEO Satellite Using Dual-Frequency GPS Data (이중 주파수 GPS 데이터를 이용한 저궤도 위성의 정밀궤도결정)

  • Hwang, Yoo-La;Lee, Byoung-Sun;Kim, Jae-Hoon;Yoon, Jae-Cheol
    • Journal of Astronomy and Space Sciences
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    • v.26 no.2
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    • pp.229-236
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    • 2009
  • KOorea Multi-purpose SATellite(KOMPSAT)-5 will be launched at 550km altitude in 2010. Accurate satellite position(20 cm) and velocity(0.03 cm/s) are required to treat highly precise Synthetic Aperture Radar(SAR) image processing. Ionosphere delay was eliminated using dual frequency GPS data and double differenced GPS measurement removed common clock errors of both GPS satellites and receiver. SAC-C carrier phase data with 0.1 Hz sampling rate was used to achieve precise orbit determination(POD) with ETRI GNSS Precise Orbit Determination(EGPOD) software, which was developed by ETRI. Dynamic model approach was used and satellite's position, velocity, and the coefficients of solar radiation pressure and drag were adjusted once per arc using Batch Least Square Estimator(BLSE) filter. Empirical accelerations for sinusoidal radial, along-track, and cross track terms were also estimated once per revolution for unmodeled dynamics. Additionally piece-wise constant acceleration for cross-track direction was estimated once per arc. The performance of POD was validated by comparing with JPL's Precise Orbit Ephemeris(POE).

Access Control of XML Documents Including Update Operators (갱신 연산을 고려한 XML문서의 접근제어)

  • Lim Chung-Hwan;Park Seog
    • Journal of KIISE:Databases
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    • v.31 no.6
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    • pp.567-584
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    • 2004
  • As XML becomes popular as the way of presenting information on the web, how to secure XML data becomes an important issue. So far study on XML security has focused on security of data communications by using digital sign or encryption technology. But, it now requires not just to communicate secure XML data on communication but also to manage query process to access XML data since XML data becomes more complicated and bigger. We can manage XML data queries by access control technique. Right now current XML data access control only deals with read operation. This approach has no option to process update XML queries. In this paper, we present XML access control model and technique that can support both read and update operations. In this paper, we will propose the operation for XML document update. Also, We will define action type as a new concept to manage authorization information and process update queries. It results in both minimizing access control steps and reducing memory cost. In addition, we can filter queries that have no access rights at the XML data, which it can reduce unnecessary tasks for processing unauthorized query. As a result of the performance evaluation, we show our access control model is proved to be better than other access control model in update query. But it has a little overhead to decide action type in select query.

Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity (개선된 선형성을 가지는 R-2R 기반 5-MS/s 10-비트 디지털-아날로그 변환기)

  • Jeong, Dong-Gil;Park, Sang-Min;Hwang, Yu-Jeong;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.149-155
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    • 2015
  • This paper proposes 5-MS/s 10-bit digital-to-analog converter(DAC) with the improved linearity. The proposed DAC consists of a 10-bit R-2R-based DAC, an output buffer using a differential voltage amplifier with rail-to-rail input range, and a band-gap reference circuit for the bias voltage. The linearity of the 10-bit R-2R DAC is improved as the resistor of 2R is implemented by including the turn-on resistance of an inverter for a switch. The output voltage range of the DAC is determined to be $2/3{\times}VDD$ from an rail-to-rail output voltage range of the R-2R DAC using a differential voltage amplifier in the output buffer. The proposed DAC is implemented using a 1-poly 8-metal 130nm CMOS process with 1.2-V supply. The measured dynamic performance of the implemented DAC are the ENOB of 9.4 bit, SNDR of 58 dB, and SFDR of 63 dBc. The measured DNL and INL are less than +/-0.35 LSB. The area and power consumption of DAC are $642.9{\times}366.6{\mu}m^2$ and 2.95 mW, respectively.

An Intra Prediction Hardware Architecture Design for Computational Complexity Reduction of HEVC Decoder (HEVC 복호기의 연산 복잡도 감소를 위한 화면내 예측 하드웨어 구조 설계)

  • Jung, Hongkyun;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.5
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    • pp.1203-1212
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    • 2013
  • In this paper, an intra prediction hardware architecture is proposed to reduce computational complexity of intra prediction in HEVC decoder. The architecture uses shared operation units and common operation units and adopts a fast smoothing decision algorithm and a fast algorithm to generate coefficients of a filter. The shared operation unit shares adders processing common equations to remove the computational redundancy. The unit computes an average value in DC mode for reducing the number of execution cycles in DC mode. In order to reduce operation units, the common operation unit uses one operation unit generating predicted pixels and filtered pixels in all prediction modes. In order to reduce processing time and operators, the decision algorithm uses only bit-comparators and the fast algorithm uses LUT instead of multiplication operators. The proposed architecture using four shared operation units and eight common operation units which can reduce execution cycles of intra prediction. The architecture is synthesized using TSMC 0.13um CMOS technology. The gate count and the maximum operating frequency are 40.5k and 164MHz, respectively. As the result of measuring the performance of the proposed architecture using the extracted data from HM 7.1, the execution cycle of the architecture is about 93.7% less than the previous design.

Performance Improvement of Spam Filtering Using User Actions (사용자 행동을 이용한 쓰레기편지 여과의 성능 개선)

  • Kim Jae-Hoon;Kim Kang-Min
    • The KIPS Transactions:PartB
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    • v.13B no.2 s.105
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    • pp.163-170
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    • 2006
  • With rapidly developing Internet applications, an e-mail has been considered as one of the most popular methods for exchanging information. The e-mail, however, has a serious problem that users ran receive a lot of unwanted e-mails, what we called, spam mails, which cause big problems economically as well as socially. In order to block and filter out the spam mails, many researchers and companies have performed many sorts of research on spam filtering. In general, users of e-mail have different criteria on deciding if an e-mail is spam or not. Furthermore, in e-mail client systems, users do different actions according to a spam mail or not. In this paper, we propose a mail filtering system using such user actions. The proposed system consists of two steps: One is an action inference step to draw user actions from an e-mail and the other is a mail classification step to decide if the e-mail is spam or not. All the two steps use incremental learning, of which an algorithm is IB2 of TiMBL. To evaluate the proposed system, we collect 12,000 mails of 12 persons. The accuracy is $81{\sim}93%$ according to each person. The proposed system outperforms, at about 14% on the average, a system that does not use any information about user actions.

Effcient Neural Network Architecture for Fat Target Detection and Recognition (목표물의 고속 탐지 및 인식을 위한 효율적인 신경망 구조)

  • Weon, Yong-Kwan;Baek, Yong-Chang;Lee, Jeong-Su
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.10
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    • pp.2461-2469
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    • 1997
  • Target detection and recognition problems, in which neural networks are widely used, require translation invariant and real-time processing in addition to the requirements that general pattern recognition problems need. This paper presents a novel architecture that meets the requirements and explains effective methodology to train the network. The proposed neural network is an architectural extension of the shared-weight neural network that is composed of the feature extraction stage followed by the pattern recognition stage. Its feature extraction stage performs correlational operation on the input with a weight kernel, and the entire neural network can be considered a nonlinear correlation filter. Therefore, the output of the proposed neural network is correlational plane with peak values at the location of the target. The architecture of this neural network is suitable for implementing with parallel or distributed computers, and this fact allows the application to the problems which require realtime processing. Net training methodology to overcome the problem caused by unbalance of the number of targets and non-targets is also introduced. To verify the performance, the proposed network is applied to detection and recognition problem of a specific automobile driving around in a parking lot. The results show no false alarms and fast processing enough to track a target that moves as fast as about 190 km per hour.

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Counterfeit Money Detection Algorithm using Non-Local Mean Value and Support Vector Machine Classifier (비지역적 특징값과 서포트 벡터 머신 분류기를 이용한 위변조 지폐 판별 알고리즘)

  • Ji, Sang-Keun;Lee, Hae-Yeoun
    • KIPS Transactions on Software and Data Engineering
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    • v.2 no.1
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    • pp.55-64
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    • 2013
  • Due to the popularization of digital high-performance capturing equipments and the emergence of powerful image-editing softwares, it is easy for anyone to make a high-quality counterfeit money. However, the probability of detecting a counterfeit money to the general public is extremely low. In this paper, we propose a counterfeit money detection algorithm using a general purpose scanner. This algorithm determines counterfeit money based on the different features in the printing process. After the non-local mean value is used to analyze the noises from each money, we extract statistical features from these noises by calculating a gray level co-occurrence matrix. Then, these features are applied to train and test the support vector machine classifier for identifying either original or counterfeit money. In the experiment, we use total 324 images of original money and counterfeit money. Also, we compare with noise features from previous researches using wiener filter and discrete wavelet transform. The accuracy of the algorithm for identifying counterfeit money was over 94%. Also, the accuracy for identifying the printing source was over 93%. The presented algorithm performs better than previous researches.