• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.811-818
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• 2016

A continuous fine-tuning phase locked loop with an additional negative feedback loop has been proposed. When the phase locked loop is out-of-lock, the phase locked loop has a fast locking characteristic using the continuous band-selection loop. When the phase locked loop is near in-lock, the bandwidth is narrowed with the fine loop. The additional negative feedback loop consists of a voltage controlled oscillator, a frequency voltage converter and its internal loop filter. It serves a negative feedback function to the main phase locked loop, and improves the phase noise characteristics and the stability of the proposed phase locked loop. The additional negative feedback loop makes the continuous fine-tuning loop work stably without any voltage fluctuation in the loop filter. Measurement results of the fabricated phase locked loop in $0.18{\mu}m$ CMOS process show that the phase noise is -109.6dBc/Hz at 2MHz offset from 742.8MHz carrier frequency.

• Journal of Veterinary Clinics
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• v.29 no.4
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• pp.339-343
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• 2012

Three dogs were presented with diaphyseal fracture of the tibia following separate motor vehicle accidents. On physical and orthopedic examinations, the dogs were noted to have soft-tissue swelling and a closed fracture in these tibia sites. Radiographs revealed a simple, short oblique fracture (case 1), a comminuted, spiral fracture (case 2), and a simple, spiral fracture (case 3) in tibia. Minimally invasive percutaneous plate osteosynthesis (MIPO) using a veterinary cuttable plate or locking plate was applied for the treatment of these fractures. The surgery was successful, and the fractures healed without any complications by 7 weeks (case 1), 10 weeks (case 2) and 8 weeks (case 3) after surgery. Our patients showed fast bone healing times and early weight-bearing during the treatment of their tibia fractures. Therefore, MIPO was a useful procedure for diaphyseal fracture of the tibia in veterinary orthopedics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.65-72
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• 2008

This paper proposes a new dual-loop digital PLL(DPLL) using seamless frequency tracking methods. The dual-loop construction, which is composed of the coarse and fine loop for fast locking time and a switching noise suppression, is used successive approximation register technique and TDC. The proposed DPLL in order to compensate the quality of jitter which follows long-term of input frequency is newly added cord conversion frequency tracking method. Also, this DPLL has VCO circuitry consisting of digitally controlled V-I converter and current-control oscillator (CCO) for robust jitter characteristics and wide lock range. The chip is fabricated with Dongbu HiTek $0.18-{\mu}m$ CMOS technology. Its operation range has the wide operation range of 0.4-2GHz and the area of $0.18mm^2$. It shows the peak-to-peak period jitter of 2 psec under no power noise and the power dissipation of 18mW at 2GHz through HSPICE simulation.