• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.3
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• pp.593-603
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• 1997

Connection admission decision in ATM networks requires decision made in real time using fast algorithm. It is difficult to construct a model of the multiplexed traffic and thus, approximation of the traffic load is necessary. In this paper, we propose a measurement-based dynamic CAC(Connection admission Control) in ATM(Asynchronous Transfer Mode) networks, which observes current traffic by the moving window and set the window size to the value which is computed from the measured cell loss amount. It is based on the measurements of the traffic load over an admission period that is load enough to reflect the current traffic behavior instead of analytic modeling. And, the dynamic reallocation of bandwidth for each class leads to effective bandwidth utilization. The performance of proposed method is analyzed through computer simulation. The performance of proposed method is analyzed by using SIMAN simulation package and FORTRAN language. As can be seen in the simulation result, cell loss performance and bandwidth utilization have been increased.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2017.06a
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• pp.78-80
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• 2017

본 논문에서는 Joint Exploration Model (JEM)을 위한 고속 화면내 부호화 알고리즘을 제안한다. 제안 방법은 JEM의 화면내 부호화 과정에서 Most Probable Mode와 Sum of Absolute Transformed Differences(SATD) 과정의 결과로 얻어지는 후보 모드들의 SATD 비용 비교를 통하여 화면내 부호화에서 높은 계산 복잡도를 요구하는 Rate-Distortion Optimization 과정의 후보 개수를 줄여 전체 부호화기의 부호화 복잡도를 낮추고자 한다. 실험 결과에서는 제안 방법이 BD-Rate 평균 0.38%의 부호화 손실만으로 평균 17%의 부호화 복잡도를 감소시킬 수 있음을 확인하였다.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.285-286
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• 2006

H.264 provide good coding efficiency compared with existing video coding standards as H.263, MPEG-4, etc. However, H.264 require the increase of encoder complexity. In this paper, fast mode decision algorithm by skipping variable block size motion estimation and spatial-predictive coding, which occupies most encoder complexity, is proposed. Experimental results show that the proposed approach can save encoding time to 55% compared with the H.264 standard.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2015.07a
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• pp.546-548
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• 2015

HEVC(High Efficiency Video Coding)는 JCT-VC(Joint Collaborative Team on Video Coding)라는 ITU-T(VCEG)와 ISO-IEC(MPEG)가 공동으로 진행한 팀이 만들어낸 표준화이다. 이 표준화된 코덱에서 율-왜곡 최적화(RDO)는 실행함에 있어 높은 성능 향상을 보이지만 상대적으로 많은 부호화 시간이 요구된다. RDO 의 부호화 시간을 줄이기 위해서 이 논문에서는 변환 계수를 이용한 고속 인트라 예측 방법을 제안한다. 기존 HEVC 에서는 RMD(Rough Mode Decision)를 통해 상위 N 개의 후보를 구하고 MPM(Most Probable Mode)을 거쳐 나온 후보들의 수의 합을 가지고 RDO 를 구하게 된다. 여기서 제안하는 고속 인트라 예측 방법은 RDO 를 구하기 전에 나왔던 N 개의 후보에서 이산 여현 변환(DCT) 계수를 이용하여 예측 모드의 수를 한 번 더 줄임으로써 RDO 수행시간을 줄이는 방법이다. 이 방법은 기존 HEVC 부호화 방법보다 적은 손실에도 불구하고 높은 속도 향상을 보인다.

• Journal of Korea Multimedia Society
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• v.10 no.8
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• pp.997-1003
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• 2007

H.264/AVC enhances inter-frame coding performance adopting new intra and inter mode prediction in inter-frame motion prediction. H.264 encoder provides performance superior to existing standards with the prediction modes. Instead of enhanced performance, however, both predictions increase complexity of encoder and demand a lot of coding time. This paper proposes a method using local statistics of resultant intra mode, my and mode map to predict inter mode. There are relationship between intra and inter mode, and we can predict inter mode using neighboring macroblocks' resultant mode and motion vector according to the contents of frame. The experimental results show that the proposed algorithm reduces encoding time by 31% on average with a negligible loss of PSNR and bitrate.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.5
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• pp.1203-1212
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• 2013

In this paper, an intra prediction hardware architecture is proposed to reduce computational complexity of intra prediction in HEVC decoder. The architecture uses shared operation units and common operation units and adopts a fast smoothing decision algorithm and a fast algorithm to generate coefficients of a filter. The shared operation unit shares adders processing common equations to remove the computational redundancy. The unit computes an average value in DC mode for reducing the number of execution cycles in DC mode. In order to reduce operation units, the common operation unit uses one operation unit generating predicted pixels and filtered pixels in all prediction modes. In order to reduce processing time and operators, the decision algorithm uses only bit-comparators and the fast algorithm uses LUT instead of multiplication operators. The proposed architecture using four shared operation units and eight common operation units which can reduce execution cycles of intra prediction. The architecture is synthesized using TSMC 0.13um CMOS technology. The gate count and the maximum operating frequency are 40.5k and 164MHz, respectively. As the result of measuring the performance of the proposed architecture using the extracted data from HM 7.1, the execution cycle of the architecture is about 93.7% less than the previous design.

• Journal of Korea Multimedia Society
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• v.11 no.7
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• pp.956-965
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• 2008

H.264/AVC is the newest video coding standard of ITU-T VCEG and the ISO/IEC MPEG, offering a significant performance improvement over previous video coding standards. However, the computational complexity of H.264/AVC is drastically increased because of new technologies such as intra prediction, variable block size, quarter-pels motion estimation/compensation, etc. In this paper, we propose a fast intra prediction scheme which has two step processing. The first step is a fast block size decision which can be calculated only in one block without considering all cases of $4{\times}4$ block and $16{\times}16$ block. The complexity of the intra prediction can be reduced by using boundary difference values of macroblock. After selecting the block size, we can make mode decision using the neighbouring reference pixels and representative pixels of the block in the second step. The experimental results show that the proposed algorithm saved on the average 41.5% encoding time without any significant PSNR losses.

• Journal of Broadcast Engineering
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• v.19 no.5
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• pp.627-630
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• 2014

The latest video coding standard, high efficiency video coding (HEVC) achieves high coding efficiency by employing a quadtree-based coding unit (CU) block partitioning structure which allows recursive splitting into four equally sized blocks. At each depth level, each CU is partitioned into variable sized blocks of prediction units (PUs). However, the determination of the best CU partition for each coding tree unit (CTU) and the best PU mode for each CU causes a dramatic increase in computational complexity. To reduce such computational complexity, we propose a fast PU decision algorithm that early terminates PU search. The proposed method skips the computation of R-D cost for certain PU modes in the current CU based on the best mode and the rate-distortion (RD) cost of the upper depth CU. Experimental results show that the proposed method reduces the computational complexity of HM12.0 to 18.1% with only 0.2% increases in BD-rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12C
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• pp.1153-1161
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• 2005

The latest standard H.264 coding methods show better efficiency compared to the former coding standards from the rate distortion point of view, but also lead to high complexity. In this paper, we propose an adaptive and fast inter/intra prediction algorithm for H.264 video coding. In the inter prediction algorithm, an effective and simple mode selection method is proposed, which can adaptively adjust to motion estimation to reduce complexity. And proposed intra prediction algorithm reduces its complexity by using calculated Minimum Rate-Distortion costs in the prediction of Intra $16{\times}16$ and $4{\times}4$ modes. From experiment using JM8.4, our algorithm can reduce about $60.9\%$ of computation time as compared to JM, with only negligible PSNR and bitrate degradation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.1028-1035
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• 1999

To increase the throughput of data transmission in burst-mode TDMA communication systems and also to get a good BER performance at the same time, it is essential to rapidly acquire the carrier while keeping the desirable tracking performance. To achieve this goal, in this paper, a new decision-directed carrier recovery algorithm is presented. The proposed scheme does not incorporate the PLL and suppress the Gaussian random process of input noise by the pre-stage low pass filter so as to get both the fast acquisition and a good performance. Through computer simulations, the performance of the scheme is analyzed with respect to the acquisition time and bit error rate. The cycle slip in the proposed scheme is seldom observed at very low SNR environment in contrast to the previous proposed one. Because of this merit, it is not required to do the differential encoding and decoding in the proposed scheme.