• Proceedings of the KIEE Conference
• /
• 2007.04c
• /
• pp.211-214
• /
• 2007

본 논문은 다계 H-브리지와 다권선 변압기를 이용하여 22.9kV 배전계통에 직접결합하여 전력품질을 보상하는 UPQC(Unified Power Quality Conditioner)를 제안하고 그 동작을 분석한 내용을 기술하고 있다. 제안하는 UPQC는 스위칭소자를 직결한 방식대신 H-브리지로 구성된 인버터모듈을 직결하는 방식으로 동작전압을 증가시켜 배전전압 22.9kV에서 동작할 수 있도록 고안되어 있다. 제안하는 시스템의 기술적 타당성을 입중하기 위해 EMTDC 소프트웨어에 의한 시뮬레이션을 통한 분석을 실시하였으며 또한 하드웨어 축소모형을 제작하여 실험을 통한 분석을 실시하였다. 이러한 검증을 통하여 제안하는 UPQC는 실제규모로 용량을 확대하여 배전계통에 결합할 경우 동작이 가능할 것으로 보인다. 제안하는 UPQC는 배전전압에 따라 H-브리지 모듈의 수를 가감하여 설계의 유연성을 확보할 수 있고 직렬주입변압기가 없이 동작이 가능하여 기존 UPQC의 직렬주입변압기에 의한 제반 취약점을 제거할 수 있다.

• The Journal of the Korea Contents Association
• /
• v.3 no.3
• /
• pp.47-54
• /
• 2003

In this paper, we implemented embedded LNUX-based UI(User Interface) board which can be applied to Human Iris recognition product. for this purpose, we also analyzed and designed LNUX operating system and adapted boot loader, kernel, control program modules according to the developed H/W architectures. As the experimental results shows that Iris recognition system is operable and embedded LNUX-based UI board which is connected to heterogeneous system by TCP/IP protocol can both successfully send and receive data this UI board has been able to obtain high performance.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 2007.05a
• /
• pp.235-240
• /
• 2007

A large power fuel cell generation system needs a parallel operation of de-de boost converter. Therefore, this paper proposed parallel operation algorithms of de-de boost converters for the large scale fuel cell generation system of 250[kW] and the operating principle along with the control method in detail. This paper uses a maximum current sharing method as a parallel operation method and also the phase shift full bridge de-de converter as a de-de boost converter. Simulation and experimental results on two prototype converter modules of 500W show that the parallel operation method can be applied to the 250[kW] power converter.

• Proceedings of the KIPE Conference
• /
• 2008.06a
• /
• pp.535-537
• /
• 2008

This paper proposes a modularized two-stage charge equalization converter for a series-connected lithium-ion battery string. In this paper, the series-connected battery sting is modularized into M modules, and each module has K cells in series. With this modularization, low voltage stress on the electronic devices can be achieved. A two-stage dc-dc converter with cell selection switches is employed. The first stage dc-dc converter steps down the high bus voltage to about 10 V. The second stage dc-dc converter integrated with selection switches equalizes the cell voltages. A prototype for 88 lithium-ion battery cells is optimally designed and implemented. Experimental results verify that the proposed equalization method has good cell balancing performance showing low voltage stress, small size, and low cost.

• International Journal of Naval Architecture and Ocean Engineering
• /
• v.8 no.2
• /
• pp.137-152
• /
• 2016

This paper studied the dynamic response of a new gasbag-type floating bridge under the effect of a moving load. The arbitrary Lagrangian-Eulerian (ALE) method was used to simulate the movement of seawater and air, and the penalty-based method was used to study the coupling between gasbags and fluid. A three-dimensional finite element model of the floating bridge was established, and the numerical model was verified by comparing with the experimental results. In order to prevent resonance, the natural frequencies and flexural mode shapes were analyzed. Based on the initial state analysis, the dynamic responses of the floating bridge subjected to different moving loads were investigated. Vertical displacements and radial deformations of gasbags under different loads were compared, and principal stress distributions of gasbags were researched while driving. The hinge forces between adjacent modules were calculated to ensure the connection strength. Besides, the floating bridge under wave impacting was analyzed. Those results can provide references for the analysis and design of this new floating bridge.

• 한국태양에너지학회:학술대회논문집
• /
• 2008.04a
• /
• pp.68-74
• /
• 2008

This paper describes the causes and effects that have influence on thermoelectric generation. If heat transfer is unequal to thermoelectric modules, we could not get the maximum thermoelectric power. So, by experiment, we analysed the differences of power generation according to the state of the contact between thermoelectric module and heat source. And with the variation of heat transfer area, the generated power was analysed also. Using the experimental results we proposed a thermoelectric generation system.

• 제어로봇시스템학회:학술대회논문집
• /
• 2005.06a
• /
• pp.1098-1100
• /
• 2005

The floorplanning problem is an essential design step in VLSI layout design and it is how to place rectangular modules as density as possible. And then, as the DSM advances, the VLSI chip becomes more congested even though more metal layers are used for routing. Usually, a VLSI chip includes several buses. As design increases in complexity, bus routing becomes a heavy task. To ease bus routing and avoid unnecessary iterations in physical design, we need to consider bus planning in early floorplanning stage. In this paper, we propose a floorplanning method for topological constraint consisting of bus constraint and memory constraint. The proposed algorithms based on Genetic Algorithm(GA) is adopted a sequence pair. For selection control, new objective functions are introduced for topological constraint. Studies on floor planning and cell placement have been reported as being applications of GA to the LSI layout problem. However, no studies have ever seen the effect of applying GA in consideration of topological constraint. Experimental results show improvement of bus and memory constraint.

• 제어로봇시스템학회:학술대회논문집
• /
• 2005.06a
• /
• pp.2414-2417
• /
• 2005

Compact Camera Module(CCM) is widely used in PDA, Celluar phone and PC web camera. With the greatly increasing use for mobile applications, there has been a considerable demands for high speed production of CCM. The major burden of production of CCM is assembly of lens module onto CCD or CMOS packaged circuit board. After module is assembled, the CCM is inspected. In this paper, we developed the image capture board for CCM and the imaging processing algorithm to inspect the defects in captured image of assembled CCMs. The performances of the developed inspection system and its algorithm are tested on samples of 10000 CCMs. Experimental results reveal that the proposed system can focus the lens of CCM within 5s and we can recognize various types of defect of CCM modules with good accuracy and high speed.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.10
• /
• pp.1598-1605
• /
• 1989

This paper describes an efficient global cell (module) placement strategy called HALO (Hierarchical Alternating Linear Ordering)which generates global 2-D placement of circuit modules by hierarchical application of linear ordering in alternating direction. We tried, in principle, to explain why HALO should perform better than other typical, somehat successful, analytical approaches such as min-cut, force-directed relaxation(FDR)or its likes. We have implemented HALO as a program for standard cell placement. Experimental results on two benchmark circuits, primary and primary 2 consisting of 752 and 2907 cells, respectively have shown a decrease of half-perimeter routing length by 7% and 24%, respectively compared to the best available results obtained so far. Total CPU time including the following detailed placement was less than half of the earlier work.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.32A no.10
• /
• pp.81-92
• /
• 1995

In this paper, we present a high-level synthesis system that generates area-efficient RT-level datapaths with multiport memories. The proposed scheduling algorithm assigns an operation to a specific control step such that maximal sharing of functional units can be achieved with minimal number of memory ports, while satisfying given constraints. We propose a measure of multiport memory cost, MAV (Multiple Access Variable) which is defined as a variable accessed at several control steps , and overall memory cost is reduced by equally distributing the MAVs throughout all the control steps. Experimental results show the effectiveness of the proposed algorithm. When compared with previous approaches for several benchmarks available from literature, the proposed algorithm generates the datapaths with less memory modules and interconnection structures by reflecting the memory cost in the scheduling process.