• Title/Summary/Keyword: experimental hardware

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A Study On RTLS(Real Time Location System) Based on RSS(Received Signal Strength) and RSS Characteristics Analysis with the External Factors (외적요인에 따른 RSS 특성 분석과 이를 이용한 실시간 위치 추적 시스템 구현에 관한 연구)

  • Lee, Seung-Ho
    • Journal of IKEEE
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    • v.15 no.1
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    • pp.76-85
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    • 2011
  • In this paper, we analysed RSS characteristics by external factors and presented an efficient algorithm for real-time location tracking and its hardware system. The proposed algorithm enhanced the ranging accuracy using Kalman Filter based on the RSS DB. The location tracking system that consists of the tag, AP(Access Point), a data collector(Data Receiver) with IEEE 802.15.4(ZigBee) network environment, and location tracking application that reveal locations of each tag is implemented for the test environment. The location tracking system presented in this paper is implemented with MSP430 microprocessor manufactured by TI(Texas Instrument), CC2420 RF chipset and the location tracking application. With the results of the experiment, the proposed algorithm and the system can achieve the efficiency and the accuracy of location tracking with the average error of 19.12cm, and its standard deviation of 5.31cm in outdoor circumstance. Also, the experimental result shows that exact tracking of position in indoor circumstance cannot achieve because of vulnerable RSS with external circumstance.

Big Data Based Dynamic Flow Aggregation over 5G Network Slicing

  • Sun, Guolin;Mareri, Bruce;Liu, Guisong;Fang, Xiufen;Jiang, Wei
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.10
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    • pp.4717-4737
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    • 2017
  • Today, smart grids, smart homes, smart water networks, and intelligent transportation, are infrastructure systems that connect our world more than we ever thought possible and are associated with a single concept, the Internet of Things (IoT). The number of devices connected to the IoT and hence the number of traffic flow increases continuously, as well as the emergence of new applications. Although cutting-edge hardware technology can be employed to achieve a fast implementation to handle this huge data streams, there will always be a limit on size of traffic supported by a given architecture. However, recent cloud-based big data technologies fortunately offer an ideal environment to handle this issue. Moreover, the ever-increasing high volume of traffic created on demand presents great challenges for flow management. As a solution, flow aggregation decreases the number of flows needed to be processed by the network. The previous works in the literature prove that most of aggregation strategies designed for smart grids aim at optimizing system operation performance. They consider a common identifier to aggregate traffic on each device, having its independent static aggregation policy. In this paper, we propose a dynamic approach to aggregate flows based on traffic characteristics and device preferences. Our algorithm runs on a big data platform to provide an end-to-end network visibility of flows, which performs high-speed and high-volume computations to identify the clusters of similar flows and aggregate massive number of mice flows into a few meta-flows. Compared with existing solutions, our approach dynamically aggregates large number of such small flows into fewer flows, based on traffic characteristics and access node preferences. Using this approach, we alleviate the problem of processing a large amount of micro flows, and also significantly improve the accuracy of meeting the access node QoS demands. We conducted experiments, using a dataset of up to 100,000 flows, and studied the performance of our algorithm analytically. The experimental results are presented to show the promising effectiveness and scalability of our proposed approach.

New Scheduling Algorithm for Fairness Criteria of ATM ABR (ATM ABR의 공평성들을 위한 새로운 스케쥴링 알고리즘)

  • Chung, Kyung-Taek;Park, Jun-Seong;Park, Hyun;Chon, Byoung-Sil
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.4
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    • pp.188-200
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    • 2002
  • The WRR scheduling algorithm is widely used in ATM networks due to its simplicity and the low cost of hardware implementation. It guarantees minimum cell rate according to the weight of each queue. The fairness is a important factor for ABR service. That is, scheduling algorithm allocates network resources fairly to each VC. However, WRR algorithm shows worse performance on bursty traffic. Because it schedules input traffics according to predetermined weight, it can not satisfies fairness criteria, MCR plus equal share and Maximum of MCR or Max-Min share, defined by ATM Forum TM 4.1 specification. The Nabeshima et al algorithm is not adapt to network status rapidly because it is not compensate the weights of unused bandwidth to VCs and assign the unused bandwidth to VCs by RR method. In this paper, we propose a scheduling algorithm for satisfying the two fairness criteria, MCR plus equal share and Maximum of MCR or Max-Min share, among the six criteria defined by ATM Forum TM 4.1 specification. The WRR, Nabeshima et al, and the proposed scheduling algorithms are compared with respect to fairness and convergence time throughout experimental simulation. According to the simulation results, the proposed algorithm shows higher fairness and more rapid convergence than other algorithms.

A Hierarchical Group-Based CAVLC Decoder (계층적 그룹 기반의 CAVLC 복호기)

  • Ham, Dong-Hyeon;Lee, Hyoung-Pyo;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.2
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    • pp.26-32
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    • 2008
  • Video compression schemes have been developed and used for many years. Currently, H.264/AVC is the most efficient video coding standard. The H.264/AVC baseline profile adopts CAVLC(Context-Adaptive Variable Length Coding) method as an entropy coding method. CAVLC gives better performance in compression ratios than conventional VLC(Variable Length Coding). However, because CAVLC decoder uses a lot of VLC tables, the CAVLC decoder requires a lot of area in terms of hardware. Conversely, since it must look up the VLC tables, it gives a worse performance in terms of software. In this paper, we propose a new hierarchical grouping method for the VLC tables. We can obtain an index of codes in the reconstructed VLC tables by simple arithmetic operations. In this method, the VLC tables are accessed just once in decoding a symbol. We modeled the proposed algorithm in C language, compiled under ARM ADS1.2 and simulated it with Armulator. Experimental results show that the proposed algorithm reduces execution time by about 80% and 15% compared with the H.264/AVC reference program JM(Joint Model) 10.2 and the arithmetic operation algorithm which is recently proposed, respectively.

New VLSI Architecture of Parallel Multiplier-Accumulator Based on Radix-2 Modified Booth Algorithm (Radix-2 MBA 기반 병렬 MAC의 VLSI 구조)

  • Seo, Young-Ho;Kim, Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.94-104
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    • 2008
  • In this paper, we propose a new architecture of multiplier-and-accumulator (MAC) for high speed multiplication and accumulation arithmetic. By combining multiplication with accumulation and devising a hybrid type of carry save adder (CSA), the performance was improved. Since the accumulator which has the largest delay in MAC was removed and its function was included into CSA, the overall performance becomes to be elevated. The proposed CSA tree uses 1's complement-based radix-2 modified booth algorithm (MBA) and has the modified array for the sign extension in order to increase the bit density of operands. The CSA propagates the carries by the least significant bits of the partial products and generates the least significant bits in advance for decreasing the number of the input bits of the final adder. Also, the proposed MAC accumulates the intermediate results in the type of sum and carry bits not the output of the final adder for improving the performance by optimizing the efficiency of pipeline scheme. The proposed architecture was synthesized with $250{\mu}m,\;180{\mu}m,\;130{\mu}m$ and 90nm standard CMOS library after designing it. We analyzed the results such as hardware resource, delay, and pipeline which are based on the theoretical and experimental estimation. We used Sakurai's alpha power low for the delay modeling. The proposed MAC has the superior properties to the standard design in many ways and its performance is twice as much than the previous research in the similar clock frequency.

Experimental studies of Glycine max Merr. (black bean), Triticum aestivum L. (wheat) and Oryza sativa L. (rice bran) extracts on the effects of hair growth activity and physical properties (검은콩, 밀, 쌀겨 추출물이 모발의 성장과 물리적 특성에 미치는 효과)

  • Park, Hye-Yoon;Kim, Su-Na;Kang, Byung-Ha;Lee, John-Hwan
    • Korean Journal of Oriental Medicine
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    • v.16 no.3
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    • pp.167-173
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    • 2010
  • Objects : Glycine max Merr. (black bean), Triticum aestivum L. (wheat) and Oryza sativa L. (rice bran) have been widely used for treatment of relaxion of smooth muscle, gastrointestinal hemorrhage and alopecia in Korean Traditional Medicine. In this research, we examined the effect of the extracts, obtained from EtOH extracts of 3 kinds of traditional plants, on hair growing activity of the DP6 and C3H10T1 cell and physical properties. Materials and Methods : On the basis of previous studies, three traditional plants were selected and we extracted them with ethanol. We evaluated their hairy dermal papillar cell proliferation activity and mouse mesenchymal stem cell in vitro model. Also, 3 herbal extracts were added to the normal shampoo formulation in ranges of 0.1% and we validated tensile properties and physical changes using aged hair. In this research, we compared the tensile strength, shine and color appearance between the hair (general formulation) and the hair after applying shampoo with natural extracts. To analyze the luster and color image, we use the SAMBA hardware and software made by Bossa Nova Technologies. Results : In the comparative test for tensile characteristic between the hair treated general formulation(control) and the hair applying special formulation including 3 kinds of extracts, tensile distance and energy of the latter are larger than control on average. The shine and color appearance were also increased after using shampoo including natural extracts(shine : 10.9%, color appearance: 24.12%). We observed the enhancement of hair growth activity in the DP6 and C3H10T1 cell. Especially black bean extracts had the most powerful effect in the dermal papillar cell proliferation. Conclusion : These experiments suggest that extracts of Glycine max Merr. (black bean), Triticum aestivum L. (wheat) and Oryza sativa L. (rice bran) stimulate the hair growth activity and can improve physical activities of aged hair. Shampoo product, which contains 3 kinds of natural extracts, would be used for the treatment for aged hair.

Microarchitectural Defense and Recovery Against Buffer Overflow Attacks (버퍼 오버플로우 공격에 대한 마이크로구조적 방어 및 복구 기법)

  • Choi, Lynn;Shin, Yong;Lee, Sang-Hoon
    • Journal of KIISE:Computer Systems and Theory
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    • v.33 no.3
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    • pp.178-192
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    • 2006
  • The buffer overflow attack is the single most dominant and lethal form of security exploits as evidenced by recent worm outbreaks such as Code Red and SQL Stammer. In this paper, we propose microarchitectural techniques that can detect and recover from such malicious code attacks. The idea is that the buffer overflow attacks usually exhibit abnormal behaviors in the system. This kind of unusual signs can be easily detected by checking the safety of memory references at runtime, avoiding the potential data or control corruptions made by such attacks. Both the hardware cost and the performance penalty of enforcing the safety guards are negligible. In addition, we propose a more aggressive technique called corruption recovery buffer (CRB), which can further increase the level of security. Combined with the safety guards, the CRB can be used to save suspicious writes made by an attack and can restore the original architecture state before the attack. By performing detailed execution-driven simulations on the programs selected from SPEC CPU2000 benchmark, we evaluate the effectiveness of the proposed microarchitectural techniques. Experimental data shows that enforcing a single safety guard can reduce the number of system failures substantially by protecting the stack against return address corruptions made by the attacks. Furthermore, a small 1KB CRB can nullify additional data corruptions made by stack smashing attacks with only less than 2% performance penalty.

Development of a System to Measure Quality of Cut Flowers of Rose and Chrysanthemum Using Machine Vision (기계시각을 이용한 장미와 국화 절화의 품질 계측장치 개발)

  • 서상룡;최승묵;조남홍;박종률
    • Journal of Biosystems Engineering
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    • v.28 no.3
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    • pp.231-238
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    • 2003
  • Rose and chrysanthemum are the most popular flowers in Korean floriculture. Sorting flowers is a labor intensive operation in cultivation of the cut flowers and needed to be mechanized. Machine vision is one of the promising solutions for this purpose. This study was carried out to develop hardware and software of a cut flower sorting system using machine vision and to test its performance. Results of this study were summarized as following; 1. Length of the cut flower measured by the machine vision system showed a good correlation with actual length of the flower at a level of the coefficients of determination (R$^2$) of 0.9948 and 0.9993 for rose and chrysanthemum respectively and average measurement errors of the system were about 2% and 1% of the shortest length of the sample flowers. The experimental result showed that the machine vision system could be used successfully to measure length of the cut flowers. 2. Stem diameter of the cut flowers measured by the machine vision system showed a correlation with actual diameter at the coefficients of determination (R$^2$) of 0.8429 and 0.9380 for rose and chrysanthemum respectively and average measurement errors of the system were about 15% and 7.5% of the shortest diameter of the sample flowers which could be a serious source of error in grading operation. It was recommended that the error rate should be considered to set up grading conditions of each class of the cut flowers. 3. Bud maturity of 20 flowers each judged using the machine vision system showed a coincidence with the judgement by inspectors at ranges of 80%∼85% and 85%∼90% for rose and chrysanthemum respectively. Performance of the machine vision system to judge bud maturity could be improved through setting up more precise criteria to judge the maturity with more samples of the flowers. 4. Quality of flower judged by stem curvature using the machine vision system showed a coincidence with the judgement by inspectors at 90% for good and 85% for bad flowers of both rose and chrysanthemum. The levels of coincidence was considered as that the machine vision system used was an acceptable system to judge the quality of flower by stem curvature.

A File System for User Special Functions using Speed-based Prefetch in Embedded Multimedia Systems (임베디드 멀티미디어 재생기에서 속도기반 미리읽기를 이용한 사용자기능 지원 파일시스템)

  • Choe, Tae-Young;Yoon, Hyeon-Ju
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.7
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    • pp.625-635
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    • 2008
  • Portable multimedia players have some different properties compared to general multimedia file server. Some of those properties are single user ownership, relatively low hardware performance, I/O burst by user special functions, and short software development cycles. Though suitable for processing multiple user requests at a time, the general multimedia file systems are not efficient for special user functions such as fast forwards/backwards. Soml' methods has been proposed to improve the performance and functionality, which the application programs give prediction hints to the file system. Unfortunately, they require the modification of all applications and recompilation. In this paper, we present a file system that efficiently supports user special functions in embedded multimedia systems using file block allocation, buffer-cache, and prefetch. A prefetch algorithm, SPRA (SPeed-based PRefetch Algorithm) predicts the next block using I/O patterns instead of hints from applications and it is resident in the file system, so doesn't affect application development process. From the experimental file system implementation and comparison with Linux readahead-based algorithms, the proposed system shows $4.29%{\sim}52.63%$ turnaround time and 1.01 to 3,09 times throughput in average.

A Three-phase Current-fed DC-DC Converter with Active Clamp (연료전지용 3상 전류형 능동클램프 DC-DC 컨버터)

  • Cha, Han-Ju;Choi, Jung-Wan;Yoon, Gi-Gab
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.6
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    • pp.456-464
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    • 2007
  • This paper proposes a novel three-phase current-fed active clamp DC-DC converter for fuel cells. A single common active clamp branch is used to limit transient voltage across the three-phase full bridge and to realize zero-voltage switching(ZVS) in all switches. To apply for the power generation system current-fed type has been combined with the three-phase power conversion system. The proposed approach has the following advantages: an increase (by a factor of three) of input current and output voltage chopping frequencies; lower RMS current through the inverter switches with higher power transfer capability; reduction in size of reactive later components and the power conditioning system; better transformer utilization; increase of the system reliability. Therefore, the proposed three-phase current-fed active clamp DC-DC converter is appropriate for the boost type DC-DC converter for fuel cells and also applicable for the photovoltaic and battery charge system. The paper details the analysis, simulation and hardware implementation of the proposed system. Finally, experimental results with the proposed PWM strategy demonstrate the feasibility of the proposed scheme on a 500W prototype converter.