• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2493-2495
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• 2001

Burst Error Channel의 에러 정정 기술로써 Reed-Solomon Product Code(RSPC)가 광범위하게 사용되고 있다. 그러나 Random Error Channel과는 달리 Burst Error Channel 상에서 RSPC의 에러 정정 평가 방법에는 많은 어려움이 있다. 우리는 이번 논문에서 Burst Error Channel 상에서 RSPC의 Error Correction Capability의 확률적인 계산 방법을 기술하려 한다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.9
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• pp.10-16
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• 2011

Interleaving is applied to prevent from exceeding the error-correction capability of channel code. At the receiver, burst errors are converted into random errors after deinterleaving, so the error-correction capability of channel code is not exceeded. However, when a receiver does not have any information on parameters used at an interleaver, interleaving can be seen as an encryption with some pattern. In this case, deinterleaving becomes complicated. In the field of blind deinterleaving, there have recently been a number of researches using linearity of linear block code. In spite of those researches, since the linearity is not applicable to a convolutional code, it is difficult to estimate parameters as in a linear block code. In this paper, we propose a method of blind block deinterleaving using convolutional code reconstruction method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.655-658
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• 2016

Xilinx 7-Series FPGA(Field Programmable Gate Array)s mainly used for the implementation of high-performance digital circuit have SRAM-type configuration memory and can malfunction when soft errors occur in their configuration memory. SEM(Soft Error Mitigation Controller) offered by Xilinx helps users mitigate the influence of soft errors in configuration memory. When soft errors occur, SEM Controller can recover the state of FPGA through partial reconfiguration if the soft errors are correctable by ECC(Error Correction Code) and CRC(Cyclic Redundancy Code). This paper presents the availability analysis of Xilinx 7-Series FPGAs against soft errors under the protection of the SEM Controller. Availability functions are derived and compared according to the correction capability of the SEM Controller. The result may help to estimate the reliability of SRAM-based FPGA running in an environment where soft errors may occur.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.140-148
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• 2013

This paper presents a iterative Bose-Chaudhuri-hocquenghem (i-BCH) code and its high-speed decoder architecture for 100 Gb/s optical communications. The proposed architecture features a very high data processing rate as well as excellent error correction capability. The proposed 6-iteration i-BCH code structure with interleaving method allows the decoder to achieve 9.34 dB net coding gain performance at $10^{-15}$ decoder output bit error rate to compensate for serious transmission quality degradation. The proposed high-speed i-BCH decoder architecture is synthesized using a 90-nm CMOS technology. It can operate at a clock frequency of 430 MHz and achieve a data processing rate of 100 Gb/s. Thus, it has potential applications in next generation forward error correction (FEC) schemes for 100 Gb/s optical communications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.41-47
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• 2010

This paper has proposed parallel BCH, one of error correction coding methods which has been used to NAND flash memory for SSD(solid state disk). To alter error correction capability, the proposed design improved reliability on data block has higher error rate as used frequency increasingly. Decoding parallel process bit width is as two times as encoding parallel process bit width, that could reduce decoding processing time, accordingly resulting in one half reduction over conventional ECC.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.5
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• pp.1083-1096
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• 1997

To implement satellite B-ISDN/ATM network, it needs to gurantee reliable transport via satelite in the poor BER environment. So, it requires to use channel coding (FEC:Forward Error Correction) schemes for improvement of BER performance, but these coding effects evoke burst errors and degradation of the QoS. Therefore we have to investigate new algorithm that compensates these weaknesses. We consider convolutional coding and concatenated coding among FEC schemes as FEC for satellite transmission and choose different compensational algorithm by the error characteristics of the using type of FEC. In using concatenated coding, this paper proposes the satellite system structure for interconnection to the terrestrial network and proposes the channel coding algorithm for improvement of transmission performances. We execute performance evaluation of the proposed algorithm by computer simulation. In detail, we propose 4 types of application ATM cell to the block coding(Reed-Solomon) and propose the new 55 byte ATM cell that enforces the error correction capability of cell header by the BCH coding. Then we propose the outer interleaverand the cell unit interleaver that evoke maximum coding effect of BCH code.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.281-284
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• 2000

This paper describes design of a (32, 28) Reed Solomon decoder for optical compact disk with double error detecting and correcting capability. A variety of error correction codes(ECCs) have been used in magnetic recordings, and optical recordings. Among the various types of ECCs, Reed Solomon(RS) codes has emerged as one the most important ones. The most complex circuit in the RS decoder is the part for finding the error location numbers by solving error location polynomial, and the circuit has great influence on overall decoder complexity. We use RAM based architecture with Euclid's algorithm, Chien search algorithm and Forney algorithm. We have developed VHDL model and peformed logic synthesis using the SYNOPSYS CAD tool. The total umber of gate is about 11,000 gates.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.278-281
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• 2002

In this paper we propose a controller which has the capability of disturbance measurement calibration for Cds array sensors in a magnetic levitation system. Steady state error due to environment light condition or external disturbance is corrected constantly. The correction is made by the sensors to measure the ball position of the system without additional deployment of sensors.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.5
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• pp.69-75
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• 2010

Advanced T-DMB(Terrestial DMB )system which is a new portable mobile broadcasting system has been developed to increase data rate up to double of conventional T-DMB in same bandwidth while maintaining backward compatibility, using hierarchical modulation method. The Advanced T-DMB system realize high qualification of conventional T-DMB system by adding BPSK signal or QPSK signal as enhanced layer to existing DQPSK signal. The enhanced layer signal should be small enough to maintain backward compatibility and to minimize the coverage loss of existing T-DMB service area. But this causes the enhanced layer signal of Advanced T-DMB susceptible to fading effect in transmission channel. In this paper we applied the duo-binary turbo code which has powerful error correction capability to the enhanced layer signal for compensating channel distortion. And the computer simulation results about the performance of the duo-binary turbo code in Advanced T-DMB system are presented along with analysis comments.

• The KIPS Transactions:PartB
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• v.9B no.1
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• pp.91-98
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• 2002

In this paper, an implementation method of the efficient image transmission stage using watermarking and channel ceding is proposed. Usually, image communication system consists of both a transmitter part and a receiver part. The transmitter part takes charge of copyright protection of the generated image data, and image coding and compression that can deal with channel noises when transmitting. In the transmitter part, we propose a channel coding method which protects both the watermark signal and the original signal for protecting the copyright of image data and solving channel noises when transmitting. Firstly, copyright protection of image data is conducted. For this, image structure analysis is performed, and both the improvement of image quality and the generation of the watermark signal are made. Then, the histogram is constructed and the watermark signals are selected from this. At this stage, by embedding of the coefficients of curve fittness into the lower 4 bits of the image data pixels, image quality degradation due to the embedding of watermark signals are prevented. Finally, turbo coding, which has the most efficient error correction capability in error correction codes, has been conducted to protect signals of watermark and preserved original image quality against noises on the transmission channel. Particularly, a new interleaving method named "semi random inter]easer" has been proposed.