• Journal of Multimedia Information System
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• v.4 no.4
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• pp.311-316
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• 2017

High Efficiency Video Coding (HEVC) is the newest video coding standard for improvement in video data compression. This new standard provides a significant improvement in picture quality, especially for high-resolution videos. A quadtree-based structure is created for the encoding and decoding processes and the rate-distortion (RD) cost is calculated for all possible dimensions of coding units in the quadtree. To get the best combination of the block an optimization process is performed in the encoder, called rate distortion optimization (RDO). In this work we are proposing a novel approach to enhance the overall RDO process of HEVC encoder. The proposed algorithm is performed in two steps. In the first step, like HEVC, it performs general rate distortion optimization. The second step is an extra checking where a SSIM based cost is evaluated. Moreover, a fast SSIM (FSSIM) calculation technique is also proposed in this paper.

• Journal of Korea Multimedia Society
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• v.14 no.7
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• pp.849-857
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• 2011

Gaming on demand(GOD) makes people enjoy games by encoding and transmitting game screen at a server side, and decoding the video at a client side. In this paper, we propose a fast game video encoder for multiple users over network with low-powered devices. In the proposed system, the computational complexity of game encoders is reduced by using scene descriptors, which consists of an object motion vector, global motion, and scene change. With additional information from game engines, the proposed encoder does not need to perform various complexity processes such as motion estimation and ratedistortion optimization. The motion estimation and rate-distortion optimization skipped by scene descriptors. We found that the proposed method improved 192 % in terms of FPS, compared with x264 software. With partial assembly code, we also improved coding speed by 86 % in terms of FPS. We found that the proposed fast encoder could encode over 60 FPS for real-time GOD applications.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.10
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• pp.543-552
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• 2004

This paper proposes an energy optimization technique for latency and quality constrained video applications. It consists of two key techniques: frame-skipping technique and buffering technique. While buffering increases the slack time utilization at the OS level. frame skipping Increases the slack time itself at the application level, and both enhance the effectiveness of the dynamic voltage scaling technique. We use an H.263 encoder application as a test vehicle to which the proposed technique is applied. Experiments demonstrate that the proposed technique achieves noticeable energy reduction satisfying the given latency and video quality constraints.

• Coupled systems mechanics
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• v.5 no.2
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• pp.191-201
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• 2016

Coupled structures are widely seen in civil and mechanical engineering. In coupled structures, monitoring the translational motion of its key components is of great importance. For instance, some coupled arms are equipped with a hydraulic piston to provide the stiffness along the piston axial direction. The piston moves back and forth and a distance sensing system is necessary to make sure that the piston is within its stroke limit. The measured motion data also give us insight into how the coupled structure works and provides information for the design optimization. This paper develops two distance sensing systems for coupled structures. The first system measures distance with ultrasonic sensor. It consists of an ultrasonic sensing module, an Arduino interface board and a control computer. The system is then further upgraded to a three-sensor version, which can measure three different sets of distance data at the same time. The three modules are synchronized by the Arduino interface board as well as the self-developed software. Each ultrasonic sensor transmits high frequency ultrasonic waves from its transmitting unit and evaluates the echo received back by the receiving unit. From the measured time interval between sending the signal and receiving the echo, the distance to an object is determined. The second distance sensing system consists of a wire draw encoder, a data collection board and the control computer. Wire draw encoder is an electromechanical device to monitor linear motion by converting a central shaft rotation into electronic pulses of the encoder. Encoder can measure displacement, velocity and acceleration simultaneously and send the measured data to the control computer via the data acquisition board. From experimental results, it is concluded that both the ultrasonic and the wire draw encoder systems can obtain the linear motion of structures in real-time.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.538-541
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• 1999

MPEG-2 AAC(Advanced Audio Coding) is the most advanced coding scheme available for high quality audio coding. This MPEG-2 AAC audio Standard allows for ITU-R ‘indistinguishable’ quality according to at data rates of 320 kb/s for five full-bandwidth channel audio signals. The compression ratio is around a factor of 1.4 better compared to MPEG Layer 3, you get the same quality at 70% of the bitrate. This paper suggest optimization method for MDCT/IMDCT (Modified Discrete Cosine Transform/Inverse Modified Discrete Cosine Transform) in Encoder and Decoder for AAC.

• ETRI Journal
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• v.35 no.2
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• pp.270-280
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• 2013

A fast intra-prediction method is proposed for High Efficiency Video Coding (HEVC) using a fast intra-mode decision and fast coding unit (CU) size decision. HEVC supports very sophisticated intra modes and a recursive quadtree-based CU structure. To provide a high coding efficiency, the mode and CU size are selected in a rate-distortion optimized manner. This causes a high computational complexity in the encoder, and, for practical applications, the complexity should be significantly reduced. In this paper, among the many predefined modes, the intra-prediction mode is chosen without rate-distortion optimization processes, instead using the difference between the minimum and second minimum of the rate-distortion cost estimation based on the Hadamard transform. The experiment results show that the proposed method achieves a 49.04% reduction in the intra-prediction time and a 32.74% reduction in the total encoding time with a nearly similar coding performance to that of HEVC test model 2.1.

• Phonetics and Speech Sciences
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• v.13 no.1
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• pp.45-51
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• 2021

End-to-end (E2E) automatic speech recognition (ASR) has achieved promising performance gains with the introduced self-attention network, Transformer. However, due to training time and the number of hyperparameters, finding the optimal hyperparameter set is computationally expensive. This paper investigates the impact of hyperparameters in the Transformer network to answer two questions: which hyperparameter plays a critical role in the task performance and training speed. The Transformer network for training has two encoder and decoder networks combined with Connectionist Temporal Classification (CTC). We have trained the model with Wall Street Journal (WSJ) SI-284 and tested on devl93 and eval92. Seventeen hyperparameters were selected from the ESPnet training configuration, and varying ranges of values were used for experiments. The result shows that "num blocks" and "linear units" hyperparameters in the encoder and decoder networks reduce Word Error Rate (WER) significantly. However, performance gain is more prominent when they are altered in the encoder network. Training duration also linearly increased as "num blocks" and "linear units" hyperparameters' values grow. Based on the experimental results, we collected the optimal values from each hyperparameter and reduced the WER up to 2.9/1.9 from dev93 and eval93 respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.260-264
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• 2013

This paper proposes a fast enhancement layer coding method to reduce computational complexity for Scalable HEVC (SHVC) which is based on High Efficiency Video Coding (HEVC). The proposed method decreases encoding time by simplifying Rate Distortion Optimization (RDO)for enhancement layers (EL). The simplification is achieved by restricting CU depths based on the correlation of coding unit (CU) depths between adjacent layers and scalability (spatial or quality) of EL. Comparing with the performance of SHM 1.0 software encoder, the proposed method reduces the encoding time by up to 31.5%.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.3
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• pp.119-124
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• 2009

In this paper, AMR-WB+ audio coder is implemented, in real-time, using Intel 400MHz Xscale PXA250 with 32bit RISC processor ARM9E-J(R)core. The assembly code for ARM9E-J(R)core is developed through the serial process of C code optimization, cross compile, assembly code manual optimization and adjusting the optimized code to Embedded Visual C++ platform. C code is trimmed on Visual C++ platform. Cross compile and assembly code manual optimization are performed on CodeWarrior with ARM compiler. Through these stages the code for both ARM EVM board and PDA is implemented. The average complexities of the code are 160.75MHz on encoder and 33.05MHz on decoder. In case of static link library(SLL), the required memories are 65.21Kbyte, 32.01Kbyte and 279.81Kbyte on encoder, decoder and common sources, respectively. The implemented coder is evaluated using 16 test vectors given by 3GPP to verify the bit-exactness of the coder.

• The Journal of the Acoustical Society of Korea
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• v.19 no.4
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• pp.37-44
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• 2000

In this paper, we described the real-time implementation effort of MPEG-4 audio HVXC (Harmonic Vector eXcitation Coding) algorithm for very low bitrates, which has target applications from mobile communications to Internet telephony, on current high performance floating point TMS320C6701 DSP. We adopted a hardware structure for real-time operation. In order for software optimization, we used C- and assembly-language level optimizations for time-critical functional codes. Utilizing the internal program memory of the DSP as the program cache, the internal data memory overlap technique and DMA functionality, we could get a goal of realtime operation of HVXC codec both at 2 kbit/s and at 4 kbit/s. For an encoder at 2 kbit/s, the optimization ratio to original code is about 96 %. Finally, we got the subjective quality of MOS 2.45 at 2 kbit/s from an informal quality test.