• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2002.11a
• /
• pp.215-218
• /
• 2002

In this paper, a dual-frequency printed slot antenna loaded with an open-ring conducting strip and capacitively fed by a coplanar waveguide(CPW) is designed. The designed antenna has a bandwidth of 240㎒(1690㎒-1930㎒) at PCS frequency band and of 160㎒(2380㎒-2540㎒) at WLAN frequency band. In both frequency ranges, pattern and gain requirements are satisfied. The commercial software, IE3D, was used to design slot antenna. The predicted characteristics along with measured data are presented for verification purpose.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2015.08a
• /
• pp.136.2-136.2
• /
• 2015

반도체 제조는 chip의 성능 향상 및 단가 하락을 위해 지속적으로 pattern size가 nano size로 감소해 왔고, capacitor 용량은 증가해 왔다. 이러한 현상은 contact hole의 aspect ratio를 지속적으로 증가시킨바, 그에 따라 최적의 HARC (high aspect ratio contact)을 확보하는 적합한 dry etch process가 필수적이다. 그러나 HARC dry etch process는 많은 critical plasma properties 에 의존하는 매우 복잡한 공정이다. 따라서, critical plasma properties를 적절히 조절하여 higher aspect ratio, higher etch selectivity, tighter critical dimension control, lower P2ID과 같은 plasma characteristics을 확보하는 것이 요구된다. 현재 critical plasma properties를 제어하기 위해 다양한 plasma etching 방법이 연구 되어왔다. 이 중 plasma를 낮은 kHz의 frequency에서 on/off 하는 pulsed plasma etching technique은 nanoscale semiconductor material의 etch 특성을 효과적으로 향상 시킬 수 있다. 따라서 본 실험에서는 dual-frequency capacitive coupled plasma (DF-CCP)을 사용하여 plasma operation 동안 duty ratio와 pulse frequency와 같은 pulse parameters를 적용하여 plasma의 특성을 각각 제어함으로써 etch selectivity와 uniformity를 향상 시키고자 하였다. Selective SiO2 contact etching을 위해 top electrode에는 60 MHz pulsed RF source power를, bottom electrode에는 2MHz pulse plasma를 인가하여 synchronously pulsed dual-frequency capacitive coupled plasma (DF-CCP)에서의 plasma 특성과 dual pulsed plasma의 sync. pulsing duty ratio의 영향에 따른 etching 특성 등을 연구 진행하였다. 또한 emissive probe를 통해 전자온도, OES를 통한 radical 분석으로 critical Plasma properties를 분석하였고 SEM을 통한 etch 특성분석과 XPS를 통한 표면분석도 함께 진행하였다. 그 결과 60%의 source duty percentage와 50%의 bias duty percentage에서 가장 향상된 etch 특성을 얻을 수 있었다.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.5
• /
• pp.77-86
• /
• 2016

This paper describes a dual-mode reference-less CDR(Clock Data Recovery) operating at full / half-rate and its operation algorithm. Proposed reference-less CDR consists of a frequency detector, a phase detector, a charge pump, a loop filter, a voltage controlled oscillator, and a digital block. The frequency and phase detectors operate at both full / half-rate for dual-mode operation and especially the frequency detector is capable of detecting the difference between data rate and clock frequency in the dead zone of general frequency detectors. Dual-mode reference-less CDR with the proposed algorithm can recover the data and clock within 1.2-1.3 us and operates reliably at both full-rate (2.7 Gb/s) and half-rate (5.4 Gb/s) with 0.5-UI input jitter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.25 no.9
• /
• pp.903-911
• /
• 2014

This paper proposes a high speed frequency synthesizer with dual phase-locked loop(PLL) structure to improve phase noise level and shape in a wideband receiver. To reduce phase noise and fractional spur, a output frequency of $1^{st}$ PLL used as reference frequency of $2^{nd}$ PLL is changed. The frequency synthesizer has been designed with 1 Hz frequency resolution using digital NCO in 6.5~8.5 GHz wide spectrum. The measured results of the fabricated frequency synthesizer show that the output power is about -3 dBm, the maximum lock-in time and phase noise are within 60 us and -95 dBc/Hz at 10 kHz offset, respectively.

• Current Optics and Photonics
• /
• v.5 no.4
• /
• pp.466-476
• /
• 2021

Frequency-multiplication technology based on microwave photonic principles can be used to generate microwave and millimeter wave signals with a wide frequency tuning range. However, the existing cascaded external modulation frequency-tupling scheme needs to ensure the phase coherence of the modulated Radio Frequency (RF) signal, while the phase modulation directly limits the frequency tuning range of the external modulation frequency multiplication. In this paper, a novel approach for generating an incoherent frequency 12-tupling signal with cascade modulation is proposed. The structure of cascaded dual-parallel Mach-Zehnder modulators can generate a frequency 12-tupling signal. The proposed structure uses no filter or phase control of the RF driving signal. Microwave photonic frequency-tupling was realized under incoherent conditions. Software simulations and experiments validated the proposed structure and proved that it can generate frequency 12-tupling microwave signals under incoherent conditions. Both the frequency range and reliability of the frequency-tupling system has been improved by the proposed structure.

• ETRI Journal
• /
• v.35 no.1
• /
• pp.150-153
• /
• 2013

In this letter, a compact and fully printed composite right- and left-handed (CRLH) dual-band power divider is proposed. The branches of the conventional Wilkinson power divider are replaced by subwavelength CRLH phase-shift lines having $+90^{\circ}$ for one frequency and $-90^{\circ}$ for another frequency for dual-band and miniaturization performance. Equations are derived for the even- and odd-mode analysis combined with the dual-band CRLH circuit. A PCS and a WLAN band are chosen as the test case and the circuit approach agrees with the CAD simulation and the measurement. Additionally, the CRLH property is shown with the dispersion diagram and the eightfold size reduction is noted.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.2
• /
• pp.152-156
• /
• 2013

This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

• Proceedings of the IEEK Conference
• /
• 2002.07b
• /
• pp.1046-1049
• /
• 2002

In this paper, a sub-harmonic dual-gate FET mixer for IMT-2000 base-station was designed by using single-gate FET cascode structure and driven by the second order harmonic component of LO signal. The dual-gate FET mixer has the characteristic of high conversion gain and good isolation between ports. Sub-harmonic mixing is frequently used to extend RF bandwidth for fixed LO frequency or to make LO frequency lower. Furthermore, the LO-to-RF isolation characteristic of a sub-harmonic mixer is better than that of a fundamental mixer because the frequency separation between the RE and LO frequency is large. As RF power is -30dBm and LO power is 0dBm, the designed mixer shows the -47.17dBm LO-to-RF leakage power level, 10dB conversion gain, -0.5dBm OIP3, -10.5dBm IIP3 and -1dBm 1dB gain compression point.

• ETRI Journal
• /
• v.43 no.6
• /
• pp.978-990
• /
• 2021

This article presents techniques for improved estimation of symbol timing offset (STO) and carrier frequency offset (CFO) for dual-polarization (DP) orthogonal frequency division multiplex (DP-OFDM) systems. Recently, quaternion multiple-input multiple-output OFDM has been proposed for high spectral efficiency communication systems, which can flexibly explore different types of diversities such as space, time, frequency, and polarization. This article focuses on synchronization techniques for DP-OFDM systems using a cyclic prefix, where the application of quaternion algebra leads to new improved estimators. Simulations performed for DP system methods show faster reduction of STO estimator variance with a double-slope line in the logvariance line versus signal-to-noise ratio (SNR) plot compared with singlepolarization (SP) counterparts, and simulations for CFO estimates show a 3-dB gain of DP over SP estimates for same SNR values defined, respectively, for quaternion-valued or complex-valued signals. Cramer-Rao bounds for STO and CFO are derived for the synchronization methods, correlating with the observed gains of DP over SP OFDM systems.

• Structural Engineering and Mechanics
• /
• v.77 no.3
• /
• pp.315-327
• /
• 2021

Here, in this research we have studied a two dimensional problem in a homogeneous orthotropic magneto-thermoelastic medium with higher order dual-phase-lag heat transfer with combined effects of rotation and hall current in generalized thermoelasticity due to time harmonic sources. As an application the bounding surface is subjected to uniformly distributed and concentrated loads (mechanical and thermal source). Fourier transform technique is used to solve the problem. The expressions for displacement components, stress components and temperature change are derived in frequency domain. Numerical inversion technique has been used to obtain the results in physical domain. The effect of frequency has been depicted with the help of graphs.