• 제목/요약/키워드: dual modules

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Implementation and Performance Analysis of Pointer Swizzling Method for Effective Access to Complex Objects (복합 객체의 효율적인 접근을 위한 포인터 스위즐링 방법의 구현 및 성능 분석)

  • Min, Jun-Gi;Gang, Heum-Geun;Lee, Seong-Jin;Jeong, Jin-Wan
    • Journal of KIISE:Computing Practices and Letters
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    • 제5권4호
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    • pp.395-404
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    • 1999
  • 포인터 스위즐링 기법은 포인터 스위즐링과 언스위즐링으로 이루어지며, 포인터 스위즐링은 객체 접근 시 객체 식별자를 해당 객체의 메모리 주소로 교체하는 것을 말하며, 언스위즐링은 객체 교체 또는 객체 저장 시에 스위즐링된 포인터를 원래의 객체 식별자로 환원하는 것을 말한다. 본 연구에서는 시스템 버퍼 구조에 따라 여러 포인터 스위즐링 기법을 분류하여 장단점을 분석하였으며, 이중 버퍼 구조 상에서 적극/소극, 직접/간접 스위즐링, 언스위즐링 모듈을 설계, 구현하였다. 또한 제한된 크기의 객체 버퍼 상에서 각 포인터 스위즐링 모듈의 성능을 평가하였다. 이 성능 평가의 결과로는 사용하지 않는 포인터는 스위즐링하지 않으며 언스위즐링 부담이 적은 소극 간접 스위즐링 기법이 일반적으로 뛰어난 성능을 나타냄을 알 수 있게 되었다.Abstract The pointer swizzling methods consist of pointer swizzling and unswizzling. Pointer swizzling replaces the OID of a object to the memory address of the object at object access time and unswizzling replaces the swizzling pointer of the OID at object replacement time or object save time. In this research, the different techniques for pointer swizzling are classified according to the system buffer structure and analyzed the pros and cons. In addition, eager/lazy, direct/indirect swizzling, unswizzling modules are designed and implemented on a dual buffering structure. Also, we evaluate the performance of pointer swizzling modules on the restricted object buffer size. The results of performance evaluation show that the performance of lazy indirect pointer swizzling technique is generally good because unused pointers are not swizzled, and unswizzling overhead is minimized.

The Influence of Changing PV Array Interconnections under a Non-uniform Irradiance

  • Ding, Kun;Feng, Li;Qin, Si-Yu;Mao, Jing;Zhang, Jing-Wei;Wang, Xiang;Peng, Tao;Zhai, Quan-Xin
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.631-642
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    • 2016
  • Usually, the output characteristics of a photovoltaic (PV) array are significantly affected by non-uniform irradiance which is caused by ambient obstacles, clouds, orientations, tilts, etc. Some local maximum power points (LMPP) in the current-voltage (I-V) curves of a PV array can result in power losses of the array. However, the output power at the global maximum power point (GMPP) is different in different interconnection schemes in a PV array. Therefore, based on the theoretical analysis and mathematical derivation of different topological structures of a PV array, this paper investigated the output characteristics of dual series PV arrays with different interconnections. The proposed mathematical models were also validated by experimental results. Finally, this paper also concluded that in terms of performance, the total cross tied (TCT) interconnection was not always the optimal structure, especially in a dual series PV array. When one of the PV modules was severely mismatched, the TCT worked worse than the series parallel (SP) structure. This research can provide guidance for switching the interconnection to gain the greatest energy yield in a changeable- structure PV system.

The Implementation of an IPv4 over IPv6 Tunnel of the DSTM for Next-Generation Internet Service (차세대 인터넷 서비스를 위한 DSTM의 IPv4 over IPv6 터널 구현)

  • Lee, Seung-Min;Min, Sang-Won;Kim, Yong-Jin
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • 제7권1호
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    • pp.75-83
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    • 2008
  • In this paper, we propose an efficient algorithm that assigns single temporary IPv4 address and port number to improve efficiency of IPv4 address that is allocated in DSTM service. And, we have analyzed the elementary functions for DSTM and have designed the functional modules. Also, we have implemented the DTI interface for encapsulation and decapsulation of IPv6 packets. The performance analysis and comparison are investigated whether the appropriate interworking service is possible or not. Our observation results show that the performance of IPv4 over IPv6 tunneling is suitable to DSTM service due to the reduction of delay by eliminating checksum calculations in the header of IPv6 tunneling.

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Control Method of Distributed-Module Type Photovoltaic Power Conditioners under Stand-alone Operation (분산모듈형 태양광 전력조절기의 독립운전 제어)

  • Seo, Jung-Won;Park, Joung-Hu;Kim, Hye-Rim
    • The Transactions of the Korean Institute of Power Electronics
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    • 제18권5호
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    • pp.448-457
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    • 2013
  • This paper proposes a control method under stand-alone operating mode for distributed-module type photovoltaic power conditioners. In conventional schemes, there are some problems of a controller saturation in the DC-link (or load) voltage controller when overly-heavy load, light load, and the generated PV power reduction occurs, as well as when a transition occurs from an overly-loaded to normal conditions. To overcome these problems, the proposed controller method switches the main control target from DC-link voltage to the maximum power point, which is closer to the stable operating point when it returns to normal operating conditions. For the analysis, a state-plane trajectory was given and the circuit analysis by PSIM simulation was done. For the verification, a prototype hardware with 110[W] and 50[W] dual photovoltaic modules has been implemented. From the results, it can be seen that PV power tracking is successfully done with the proposed method even under a stand-alone operation mode.

A Selective Voltage Balancing Scheme of a Modular Multilevel DC-DC Converter for Solid-State Transformers (반도체 변압기용 모듈형 멀티레벨 DC-DC 컨버터의 선택적인 전압 균형 제어)

  • Lee, Eui-Jae;Kim, Seok-Min;Lee, Kyo-Beum
    • Journal of IKEEE
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    • 제23권2호
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    • pp.652-658
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    • 2019
  • This paper proposes the selective voltage balancing scheme of a modular multilevel DC-DC converter for solid-state transformers. In general, the sub-module capacitor voltage can be controlled uniformly by individual feedback controllers, however computation time increases according to the number of modules. The voltage balance control scheme in this paper can reduce the computation time by selecting and controlling sub-module of maximum/minimum voltage momentarily. The performance of the proposed selective voltage balancing scheme is verified by simulation.

A Study on the Implementation of Digital Filters with Reduced Memory Space and Dual Impulse Response Types (기억용량 절약과 순회방식 선택이 가능한 디지털 필터의 구성에 관한 연구)

  • Park, In Jung;Rhee, Tae Won
    • Journal of the Korean Institute of Telematics and Electronics
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    • 제23권6호
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    • pp.950-956
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    • 1986
  • In this paper, a direct addressing mode of a microprocessor is introduced to save memory capacity, and also a dedicated digital filter is constructed to speed up the filter processing and to enable an easy selection of the impulse response types. A theoretical analysis has been conducted on the errors caused by the finite word klength, rounding-off and multiplication procedures. The digital filter designed by the proposed method is made into a module which can function as a 7th-order recursive or a 14-order nonrecursive type with a simples witch operation. The proposed filter is implemented on a printed-circuit board. The frequency characteristics of this filter can be controlled by the multiplication values stored in ROMs. A low-pass, a high-pass and a band-pass filter have been designed and their frequency characteristics are verified by actual measurements. For a order higher filer, two filter modules have been cascaded into an integrated filter of 23rd-order non-recursive low-pass type and a 12th-order recursive multiband type. Their frequency characteirstics have been found to agree with the theory.

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Design, Analysis, and Equivalent Circuit Modeling of Dual Band PIFA Using a Stub for Performance Enhancement

  • Yousaf, Jawad;Jung, Hojin;Kim, Kwangho;Nah, Wansoo
    • Journal of electromagnetic engineering and science
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    • 제16권3호
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    • pp.169-181
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    • 2016
  • This work presents a new method for enhancing the performance of a dual band Planer Inverted-F Antenna (PIFA) and its lumped equivalent circuit formulation. The performance of a PIFA in terms of return loss, bandwidth, gain, and efficiency is improved with the addition of the proposed open stub in the radiating element of the PIFA without disturbing the operating resonance frequencies of the antenna. In specific cases, various simulated and fabricated PIFA models illustrate that the return loss, bandwidth, gain, and efficiency values of antennas with longer optimum open stub lengths can be enhanced up to 4.6 dB, 17%, 1.8 dBi, and 12.4% respectively, when compared with models that do not have open stubs. The proposed open stub is small and does not interfere with the surrounding active modules; therefore, this method is extremely attractive from a practical implementation point of view. The second presented work is a simple procedure for the development of a lumped equivalent circuit model of a dual band PIFA using the rational approximation of its frequency domain response. In this method, the PIFA's measured frequency response is approximated to a rational function using a vector fitting technique and then electrical circuit parameters are extracted from it. The measured results show good agreement with the electrical circuit results. A correlation study between circuit elements and physical open stub lengths in various antenna models is also discussed in detail; this information could be useful for the enhancement of the performance of a PIFA as well as for its systematic design. The computed radiated power obtained using the electrical model is in agreement with the radiated power results obtained through the full wave electromagnetic simulations of the antenna models. The presented approach offers the advantage of saving computation time for full wave EM simulations. In addition, the electrical circuit depicting almost perfect characteristics for return loss and radiated power can be shared with antenna users without sharing the actual antenna structure in cases involving confidentiality limitations.

The Inplementation of Fault-Tolerant Dual System Using the Hot-Standby Sparing Technique (핫 스탠바이 스페어링 기법을 이용한 고장 감내 이중화 시스템 설계)

  • Shin Jin wook;Park Dong sun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제29권10A호
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    • pp.1113-1122
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    • 2004
  • This paper is basically to achieve the high-availability and high-reliability of the control system from the implementation of the fault-tolerant system using the hot-standby sparing technique. To meet the objective, we design and implement a board with fault tolerance I/O bus to detect the fault. Warm-standby sparing technique is the fault tolerance technique usually used for switching control system in present. This technique can be easily implemented, but can not detect the fault quickly and can malfunction because of the hardware fault. The hot-standby sparing fault tolerant technique implemented in this paper is consists of dual processor modules and a I/O processor using fault tolerant I/O bus. The proposed method can find the faults as soon as possible, so it can prevent from wrong operation. Also it is possible to normal re-service due to the short recovering time. To implement the fault-tolerant dual system with fault detection be, two daughter, called FTMA and FTIA, boards designed and implemented are applied to the system. And we also simulated the proposed method to verify the high-availability and high-reliability of the control system using Markov process.

Development of a Small Animal Positron Emission Tomography Using Dual-layer Phoswich Detector and Position Sensitive Photomultiplier Tube: Preliminary Results (두층 섬광결정과 위치민감형광전자증배관을 이용한 소동물 양전자방출단층촬영기 개발: 기초실험 결과)

  • Jeong, Myung-Hwan;Choi, Yong;Chung, Yong-Hyun;Song, Tae-Yong;Jung, Jin-Ho;Hong, Key-Jo;Min, Byung-Jun;Choe, Yearn-Seong;Lee, Kyung-Han;Kim, Byung-Tae
    • The Korean Journal of Nuclear Medicine
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    • 제38권5호
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    • pp.338-343
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    • 2004
  • Purpose: The purpose of this study was to develop a small animal PET using dual layer phoswich detector to minimize parallax error that degrades spatial resolution at the outer part of field-of-view (FOV). Materials and Methods: A simulation tool GATE (Geant4 Application for Tomographic Emission) was used to derive optimal parameters of small PET, and PET was developed employing the parameters. Lutetium Oxyorthosilicate (LSO) and Lutetium-Yttrium Aluminate-Perovskite(LuYAP) was used to construct dual layer phoswitch crystal. $8{\times}8$ arrays of LSO and LuYAP pixels, $2mm{\times}2mm{\times}8mm$ in size, were coupled to a 64-channel position sensitive photomultiplier tube. The system consisted of 16 detector modules arranged to one ring configuration (ring inner diameter 10 cm, FOV of 8 cm). The data from phoswich detector modules were fed into an ADC board in the data acquisition and preprocessing PC via sockets, decoder block, FPGA board, and bus board. These were linked to the master PC that stored the events data on hard disk. Results: In a preliminary test of the system, reconstructed images were obtained by using a pair of detectors and sensitivity and spatial resolution were measured. Spatial resolution was 2.3 mm FWHM and sensitivity was 10.9 $cps/{\mu}Ci$ at the center of FOV. Conclusion: The radioactivity distribution patterns were accurately represented in sinograms and images obtained by PET with a pair of detectors. These preliminary results indicate that it is promising to develop a high performance small animal PET.

Damping Analysis using IEEEST PSS and PSS2A PSS

  • Lee Sang-Seung;Kang Sang-Hee;Jang Gwang-Soo;Li Shan-Ying;Park Jong-Keun;Moon Seung-Il;Yoon Yong-Tae
    • Journal of Electrical Engineering and Technology
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    • 제1권3호
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    • pp.271-278
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    • 2006
  • This paper scrutinized the damping effects of installing the prototype PSSs by a transient analysis for eight buses of faults in the South Korean power system. The PSSs used have the co-PSS blocks for IEEEST model with a single input and the co+power PSS blocks for PSS2A model with dual inputs. The simulation tool was a TSAT(Transient Security Assessment Tool) developed by Powertech Labs Inc. The voltages of the transmission line for simulations were 765kV and 345kV, and the faults for eight cases were sequenced by considering the open state and the close state of the lines. In the simulations, the three-phase line to ground (L-G) fault generated different points for each region. The simulations were compared to the cases of no PSS, partial IEEEST and PSS2A, absolute IEEEST, and absolute PSS2A to show that the power system oscillation can be effectively damped by PSS modules. Simulations were conducted to confirm the effectiveness for the KEPCO (Korea Electric Power Corporation) power system.