• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.249-258
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• 2002

One of the jai or purposes of multiprocessor system is to get a high efficiency in performance improvement. But in most cases, it is unavoidable to use some special programming languages or tools for full use of multiprocessor system. In general, loop and recursive call statements of algorithms are considered as typical parts for parallelization. Especially, recursive call statements are easy to parallelize conceptually without support of any special languages or tools. But it is difficult to control the degree of parallelism caused by high depth of recursive call leading to execution crash. This paper proposes a device to control Parallelism in the process of POSIX thread bated parallelization of recursive algorithms. For this, we define the concept of thread and process in UNIX system, and analyze the results of experimental application of the device to quick sorting algorithm.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.5
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• pp.997-1006
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• 2019

To overcome the difficulties and inefficiencies of the existing power analysis attack, we try to extract the secret key embedded in a cryptographic device using attack model based on MLP(Multi-Layer Perceptron) method. The target of our proposed power analysis attack is the AES-128 encryption module implemented on an 8-bit processor XMEGA128. We use the divide-and-conquer method in bytes to recover the whole 16 bytes secret key. As a result, the MLP-based power analysis attack can extract the secret key with the accuracy of 89.51%. Additionally, this MLP model has the 94.51% accuracy when the pre-processing method on power traces is applied. Compared to the machine leaning-based model SVM(Support Vector Machine), we show that the MLP can be a outstanding method in power analysis attacks due to excellent ability for feature extraction.

• The KIPS Transactions:PartD
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• v.9D no.6
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• pp.1083-1090
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• 2002

The software development methodology has not caught up with the rapid change of information technology. Most of the software development projects use structural methodology or information engineering methodology. If established software development methodologies don't reflect technologies applied to the project, the project may be performed ineffectively. This paper describes a model in which we can apply a new information technology to an already existed structural methodology or information engineering methodology. This model uses the technique of the divide and conquer that software development life cycle is divided into phases, each phase is divided into viewpoint- areas and the software development processes of a new information technology are applied to each small area. By using the design phase this paper shows application example, in which I applied web-based development processes to CS@RoadMap Methodology of KCC Information & Communication, a system provider in Korea. The CS@RoadMap Methodology reflecting the Web technology, Web@RoadMap Methodology, has been applied to the public-domain projects.

• The Journal of the Korea Contents Association
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• v.8 no.5
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• pp.52-60
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• 2008

A simple Time Division Multiplex(TDM) switching system which has been widely in satellite networks provides any size of bandwidth for a number of low bandwidth subscribers by allocating proper number of time slots in a frame. In this paper, we propose a new approach based on graph coloring model for efficient time slot assignment algorithm in contrast to network flow model in previous works. When the frame length of an initial matrix of time slot requests is 2's power, this matrix is divided into two matrices of time slot requests using binary divide and conquer method based on the graph coloring model. This process is continued until resulting matrices of time slot requests are of length one. While the most efficient algorithm proposed in the literature has time complexity of $O(N^{4.5})$, the time complexity of the proposed algorithm is $O(NLlog_2L)$, where N is the number of input/output links and L is the number of time slot alloted to each link in the frame.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.9
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• pp.592-607
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• 2006

This paper proposes a technique to select processors and hardware IPs and to map the tasks into the selected processing elements, aming to achieve high performance with minimal system cost when multitask applications with real-time constraints are run on a multicore SoC. Such technique is called to 'Hardware-Software Cosynthesis Technique'. A cosynthesis technique was already presented in our early work [1] where we divide the complex cosynthesis problem into three subproblems and conquer each subproblem separately: selection of appropriate processing components, mapping and scheduling of function blocks to the selected processing component, and schedulability analysis. Despite good features, our previous technique has a serious limitation that a task monopolizes the entire system resource to get the minimum schedule length. But in general we may obtain higher performance in multitask multicore system if independent multiple tasks are running concurrently on different processor cores. In this paper, we present two mapping techniques, task mapping avoidance technique(TMA) and task mapping pinning technique(TMP), which are applicable for general cases with diverse operating policies in a multicore environment. We could obtain significant performance improvement for a multimedia real-time application, multi-channel Digital Video Recorder system and for randomly generated multitask graphs obtained from the related works.

• Journal of the Korea Society of Computer and Information
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• v.17 no.4
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• pp.139-145
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• 2012

Generally, Quicksort selects the pivot from leftmost, rightmost, middle, or random location in the array. This paper suggests Quicksort using middle range pivot $P_0$ and continually divides into 2. This method searches the minimum value $L$ and maximum value $H$ in the length n of list $A$. Then compute the initial pivot key $P_0=(H+L)/2$ and swaps $a[i]{\geq}P_0$,$a[j]<P_0$ until $i$=$j$ or $i$>$j$. After the swap, the length of list $A_0$ separates in two lists $a[1]{\leq}A_1{\leq}a[j]$ and $a[i]{\leq}A_2{\leq}a[n]$ and the pivot values are selected by $P_1=P_0/2$, $P_2=P_0+P_1$. This process repeated until the length of partial list is two. At the length of list is two and $a$[1]>$a$[2], swaps as $a[1]{\leftrightarrow}a[2]$. This method is simpler pivot key process than Quicksort and improved the worst-case computational complexity $O(n^2)$ to $O(n{\log}n)$.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.3
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• pp.185-191
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• 2022

This paper proposed a division algorithm of performance complexity $O{\frac{n(n+1)}{2}}$ for a change-making problem(CMP) in which polynomial time algorithms are not known as NP-hard problem. CMP seeks to minimize the sum of the x_j number of coins exchanged when a given amount of money C is exchanged for c_j,j=1,2,⋯,n coins. Known polynomial algorithms for CMPs are greedy algorithms(GA), divide-and-conquer (DC), and dynamic programming(DP). The optimal solution can be obtained by DP of O(nC), and in general, when given C>2ⁿ, the performance complexity tends to increase exponentially, so it cannot be called a polynomial algorithm. This paper proposes a simple algorithm that calculates quotient by dividing upper triangular matrices and main diagonal for k×n matrices in which only j columns are placed in descending order of c_j of n for c_j ≤ C and i rows are placed k excluding all the dividers in c_j. The application of the proposed algorithm to 39 benchmarking experimental data of various types showed that the optimal solution could be obtained quickly and accurately with only a calculator.