• 제목/요약/키워드: digital signal processor

검색결과 811건 처리시간 0.031초

고속 고강성 이송시스템을 위한 리니어 모터 드라이브 개발 (Development of Linear motor diver for high speed and stiffness feed system)

  • 최정원;김상은;이기동;박정일;이석규
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2001년도 춘계학술대회 논문집
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    • pp.167-169
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    • 2001
  • In this paper, a controller design for high speed and stiffness linear motor is implemented. The designed controller is mainly composed of speed and current controller, which are carried out by the high-speed digital signal processor(DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented by using 32-bit DSP(TMS320C31), a high-integrated logic device(EPM7128), and IPM(Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for high speed and stiffness linear motor.

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내장형 시스템에 적합한 32 비트 RISC/DSP 마이크로프로세서에 관한 연구 (A Study on the 32 bit RISC/DSP Microprocessor Appropriate for Embedded Systems)

  • 유동열;문병인;홍종욱;이태영;이용석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.257-260
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    • 1999
  • We have designed a 32-bit RISC microprocessor with 16/32-bit fixed-point DSP functionality. This processor, called YRD-5, combines both general-purpose microprocessor and digital signal processor (DSP) functionality using the reduced instruction set computer (RISC) design principles. It has functional units for arithmetic operation, digital signal processing (DSP) and memory access. They operate in parallel in order to remove stall cycles after DSP and load/store instructions with one or more issue latency cycles. High performance was achieved with these parallel functional units while adopting a sophisticated 5-stage pipeline structure and an improved DSP unit.

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주파수 대역에서의 피드백 제거 알고리즘의 보청기 응용 (Hearing aid application of feedback cancellation algorithm in frequency domain)

  • 장순석
    • 한국음향학회지
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    • 제35권4호
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    • pp.272-279
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    • 2016
  • 본 논문은 보청기의 피드백 제거 알고리즘을 실시간으로 실현한 내용을 다루었다. 기존의 시간 영역에서의 최소 평균 자승 기법을 주파수 영역으로 변환하여 처리함으로써 계산상의 부하를 최소화하였다. 적응 필터 알고리즘의 확인은 Matlab(Matrix laboratory) 기반으로 수행하였고, 이를 CSR 8675 블루투스 DSP IC(Digital Signal Processor Integrated Circuit) 칩 펌웨어로 실현하고 검증해보였다. 스마트폰으로의 원격 무선 제어 기능이 포함된 스마트 보청기는 사용자 접근 편의성이 강화된다.

Design and Application of a Passive Filter Control System

  • Jeon, Jeong-Chay;Yoo, Jae-Geun;Lee, Sang-Ick
    • KIEE International Transactions on Power Engineering
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    • 제4A권3호
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    • pp.152-158
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    • 2004
  • The passive filter is economic and efficient in suppressing harmonics but it may cause resonance problems and its performance is constantly dependent on power system impedance or working conditions of loads. This paper presents the DSP (Digital Signal Processor)-based control system, which automatically controls the passive filter in order to solve these problems. The control system can automatically control the passive filter according to working conditions of loads and measured harmonics, reactive power, power factor and so on. Experimental results in the power system using the 100HP DC motor drive are presented in order to verify the performance of the control system.

무철심형 선형 동기전동기의 드라이브 설계에 관한 연구 (A Study on the Design of Drive for Coreless Linear Synchronous Motor)

  • 김상우;이재헌;김상은;김종무;이석규
    • 대한전기학회논문지:시스템및제어부문D
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    • 제50권6호
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    • pp.266-271
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    • 2001
  • In this paper, a controller design for coreless linear synchronous motor is proposed. The designed controller is mainly composed of speed and current control, which are carried out by the high-speed digital signal processor(DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented using by 32-bit DSP(TMS320C31), a high-integrated logic device(EPM940), and IPM(Intelligent Power Modules) for compact and powerful system design. The experimental results show the effective performance of controller for coreless linear synchronous motor.

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DSSS 수신기에서 동기탐색을 위한 고속 정합필터 (A High-Speed Matched Filter for Searching Synchronization in DSSS Receiver)

  • 송명렬
    • 한국통신학회논문지
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    • 제27권10C호
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    • pp.999-1007
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    • 2002
  • 본 논문에서는 DSSS (Direct Sequence Spread Spectrum) 수신기에서 초기동기 탐색에 사용될 수 있는 정합필터에 대해서 연구하였다. 하드웨어기술언어 (HDL)로 정합필터를 구현하기 위한 모델이 제시되었다. 제안된 모델은 고속 처리를 위해 병렬처리와 파이프라인 구조를 기반으로 하는데 환형버퍼, 곱셈기, 덧셈기, 코드참조표 등으로 구성되어 있다. 제안된 모델에 대해 성능을 분석하였고 일반적인 DSP (Digital Signal Processor)로 구현할 경우와 비교하였다. 제안된 모델을 FPGA (Field Programmable Gate Array)상에 구현하였고 타이밍 시뮬레이션 결과를 통해서 동작을 검증하였다.

다항식형 전치왜곡기를 이용한 전력증폭기 선형화 (Power Amplifier Linearization using the Polynomial Type Predistorter)

  • 민이규;이상설
    • 한국전자파학회논문지
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    • 제12권7호
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    • pp.1102-1109
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    • 2001
  • 다항식형 전치왜곡기를 이용한 적응 전치왜곡 선형화기의 새로운 구조를 제안한다. 제안된 선형화기에서는 전치왜곡을 포함한 대부분의 연산이 DSP(digital signal processor)로 수행된다. 전치 왜곡기의 출력신호와 후처리기 의 출력 신호 사이 의 오차를 최소화하기 위하여 RLS(recursive least squares) 앨거리즘을 적용한다. 씨뮬레이션 결과 ACPR(adjacent channel power ratio)이 대역 가장자리에서 40 dB 이상 개선된다. 선형화기의 수렴 및 재수렴 특성 역시 만족스러운 성능을 보인다.

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Analysis, Design, and Implementation of a Single-Phase Power-Factor Corrected AC-DC Zeta Converter with High Frequency Isolation

  • Singh, Bhim;Agrawal, Mahima;Dwivedi, Sanjeet
    • Journal of Electrical Engineering and Technology
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    • 제3권2호
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    • pp.243-253
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    • 2008
  • This paper deals with the analysis, design, and implementation of a single phase AC-DC Zeta converter with high frequency transformer isolation and power factor correction(PFC) in two modes of operation, discontinuous current mode of operation(DCM), and continuous current mode of operation(CCM). A Digital Signal Processor(DSP) based implementation is carried out for validation of the Zeta converter developed design in discontinuous mode of operation. A comparison of both modes of operation is presented for a 1kW power rating from the point of view of steady state and dynamic behavior, power quality, simplicity, control technique, device rating, and converter size. The experimental results of a developed prototype of Zeta converter are presented for validation of the developed design. It is observed that CCM is most suitable for higher power applications where it requires some complex control and sensing of the additional variables.

고배속 CD-RW 시스템을 위한 중점 서보 제어 (Center Compensation Servo Control for High Speed CD-RW System)

  • 서삼준;김동식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 D
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    • pp.2438-2440
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    • 2003
  • This thesis presents a design methodology of a Digital Servo Signal Processor for high speed CD-ROM drive systems. The proposed Digital Servo Signal Processor enables us to develop CD-related systems for the very high speed applications and is one of the key components of the CD-ROM systems. The proposed center compensation servo control is newly built for a actuator shaking due to the fast response of a step motor when it jumps to a long distance. From experimental results, we can see that the performance of the control system is improved greatly. The proposed servo algorithm shows a shorter setting time including a pull-in time and a faster access time.

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Adaptive Control of a Single Rod Hydraulic Cylinder - Load System under Unknown Nonlinear Friction

  • Lee Myeong-Ho;Park Hyung-Bae
    • Journal of Advanced Marine Engineering and Technology
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    • 제29권3호
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    • pp.251-259
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    • 2005
  • A discrete time model reference adaptive control has been applied in order to compensate the nonlinear friction characteristics in a hydraulic proportional position control system. As nonlinear friction, static and coulomb friction forces are considered and modeled as dead zone and external disturbance respectively. The model reference adaptive control system consists of a cascade combination of the dead zone. external disturbance and linear dynamic block. For adaptive control experiment. the DSP(Digital Signal Processor) board has been interfaced the hydraulic proportional position control system. The experimental results show that the MRAC(Model Reference Adaptive Control) for compensation of static and coulomb friction are very effective.