• Korean Journal of Remote Sensing
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• v.24 no.2
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• pp.179-188
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• 2008

This study aims for generating a city spatial model required for the creation of a 3D noise map. In this study, we propose an efficient method to generate 3D models of the terrain and buildings using only a digital map and draft maps previously established without using any sensory data. The terrain model is generated by interpolating into a grid the elevation values derived from both the contour lines and the elevation point of the digital map. Building model is generated by combining the 2D building boundaries and the building elevations extracted from the digital map and the draft map, respectively. This method has been then applied to a digital map and three sets of draft maps created in the different times. covering the entire area of Yeongdeungpo-gu. The generated city spatial model has been successfully utilized for the noise analysis and the 3D visualization of the analysis results.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.4
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• pp.165-172
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• 2006

In this paper we present a technique for detecting cross-reference points that allows improving watermark detect-ability. In general, Harris detector is commonly used for finding salient points. Harris detector is a kind of combined corner and edge detector which is based on neighboring image data distribution, therefore it has some limitation to find accurate salient points after watermark embedding or any kinds of digital attacks. The new method proposed in this paper used not data distribution but geometrical structure of a normalized image in order to avoid pointing error caused by the distortion of image data. After normalization, we constructed pre-specified number of virtual lines from top to bottom and left to right, and several of cross points were selected by a random key. These selected points specify almost same positions with the accuracy more than that of Harris detector after digital attacks. These points were arranged by a random key, and blocks centered in these points were formed. A reference watermark is formed by a block and embedded in the next block. Because same alteration is applied to the watermark generated and embedded blocks. the detect-ability of watermark is improved even after digital attacks.

• Journal of Korea Multimedia Society
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• v.7 no.4
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• pp.459-466
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• 2004

In this paper, an effective skeleton method is proposed in order to obtain an enhanced digital image of skeleton line. The binary image using the threshold values is applied in the preprocessing stage and then the modified parallel processing method is applied to obtain the improved image of skeleton line. The existing skeleton methods are Rutovitz, Steiabelli and other five skeleton methods. In the digital process of skeleton line, the major problem caused by these methods is elongated lines and noise branches of the processed image. In this study, however, such noises are deleted first by the modified parallel processing step of the proposed method. Then a pixel is compared to its eight neighbor pixels. if its neighbor pixels are in one of the eight conditions, the central pixel is deleted. As a result, the quality of the skeleton is better then those produced by the existing skeleton methods.

• ETRI Journal
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• v.28 no.1
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• pp.9-16
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• 2006

In this paper, we analyzed and measured the electrical crosstalk characteristics of a 1.25 Gbps triplexer module for Ethernet passive optical networks to realize fiber-tothe-home services. Electrical crosstalk characteristic of the 1.25 Gbps optical triplexer module on a resistive silicon substrate should be more serious than on a dielectric substrate. Consequently, using the finite element method, we analyze the electrical crosstalk phenomena and propose a silicon substrate structure with a dummy ground line that is the simplest low-crosstalk layout configuration in the 1.25 Gbps optical triplexer module. The triplexer module consists of a laser diode as a transmitter, a digital photodetector as a digital data receiver, and an analog photodetector as a cable television signal receiver. According to IEEE 802.3ah and ITU-T G.983.3, the digital receiver and analog receiver sensitivities have to meet -24 dBm at $BER=10^{-12}$ and -7.7 dBm at 44 dB SNR. The electrical crosstalk levels have to maintain less than -86 dB from DC to 3 GHz. From analysis and measurement results, the proposed silicon substrate structure that contains the dummy line with $100\;{\mu}m$ space from the signal lines and 4 mm separations among the devices satisfies the electrical crosstalk level compared to a simple structure. This proposed structure can be easily implemented with design convenience and greatly reduce the silicon substrate size by about 50 %.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1288-1293
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• 2005

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The CMIEDDs represents extension valued multiple-output functions, while TDBM systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

• Proceedings of the KIEE Conference
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• 2002.04a
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• pp.96-98
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• 2002

This paper proposes the digital pin line checker which can extremely improve the efficiency of the pine line checking using a micro processor. The line checker is designed which can check efficiently up to maximum 2048 pin. Alarm busser is designed ringing real-timely the case that the pin line is connected differently with real node number. Accordingly the comparing and identifying work visually the node number showing on the displaying board with real node number is avoided after the electronic stimulus enforce to the pin of the fixture by the test engineer. The digital line checker is designed based on the 8051. And the effectiveness and accuracy of the proposed line checking strategy is tested by simulating the several error connections for pin lines on the small scale board.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.6
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• pp.1562-1574
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• 1998

We, in this paper, have implemented T1, E1 and fractional E1 HDSL(High-bit-rate digital subscriber line) function over an ATM switching system. The maxi$\mu$ loop lengths for subscriber service and cell loss rates to meet the bit error rate of 10$^{-7}$ at transmission of 2B1Q HDSL data E1 rate over existing telephone copper wires in the presence of the significant impairments such as NEXT(Nearned crosstalk), impulse noise, power line noise and longitudinal over the CSAs environment consisting of 26 gauge and 25 gauge unloaded copper telephone lines has assessed. HDSL will intially be used to serve private-DS1, ISDN-BRA, and DLC feeders, later DS1 extension from optic fiber cable. We also present market provision for the HDSL.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.53 no.6
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• pp.316-323
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• 2004

This paper develops an ADWHM(Advanced Digital Watt-Hour Meter) which integrates and implements the voltage management data record function and the load management data record function in the electronic watt-hour meter. ADWHM is developed based on PIC16F874 which is 8bit micro-controller of RISK type for the easy of programing and maintenance, and electronic power signal processing module is located at front of it to reduce the computing load of processor. Also, a 16kbyte EEPROM is used to record the voltage management data and load management data for a week as well as watt-hour data and USART communication mode is used to transfer data from ADWHM to PC. The accuracy of the voltage and unt measuring for ADWHM is verified by identifying the LCD display values of the ADWHM after the voltage signals of id levels from digital function generator is applied to PT(Potential Transformer) and CT(Current Transformer) output under state which it is separated from real power line. On the its basic functions such as watt-hour data recording function, voltage management data recording function and load management data recording function was verified by showing data for three days among the collected data to PC by RS232C communication from ADWHM which was connected to real power lines for a week.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.12
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• pp.159-164
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• 2005

Recently, it has demanded high-speed digital circuits as information increase. Therefore, electromagnetic characteristics of compact microwave circuit occurred importantly. And, the effect of the imperfect ground plane on the signal integrity and influence of coupling between two parallel lines for high-speed digital transmission line on the printed circuit board is investigated by FDTD simulations in 3-D electromagnetic analysis method. The results of FDTD simulation are compared with the ADS simulation in commercial software, analyzed lumped element of modeling and electromagnetic wave's radiation of slot as frequency. As a consequence, when the slot in the ground plane is under microstrip line, it has much effect on propagation of wave.

• The Bulletin of The Korean Astronomical Society
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• v.37 no.2
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• pp.228.1-228.1
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• 2012

Digital waveform generation technology for SAR payload can be divided into DDS(Direct Digital Synthesizer) method and Memory Mapped(M/M) method. DDS is the single chip which consists of the Sine Table, NCO(Numerically Controlled Oscillator), DAC, and so on. DDS method is a very simple method because the circuit configuration is not complex but has a disadvantage that can not control phase and amplitude easily by using NCO. M/M method has the complexity of the circuit configuration because it requires the memories which stores the waveforms, the control circuits, and DAC. And this method should apply the high interface technology for being compatible with the wide bandwidth of the digital signal and has the difficulty for PCB design because the number of the signal lines should be increased according to the number of the data bits for DAC. Although it has several disadvantages, this method has the capability of pre-distortion function which can compensate the phase and amplitude characteristics of the system and also has an excellent advantage to make any arbitrary waveform, so this method is considered as an important technology with DDS method. This research describes the technological trends of the waveform generator for the SAR payload and analyzes the characteristics of the technology.