• 제목/요약/키워드: deposited layer

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비정질 금속 기판상에 증착된 YBCO 박막의 결정성에 대한 CEO$_2$ 완충막의 효과 (Effect of CeO$_2$ buffer layer on the crystallization of YBCO thin film on Hastelloy substrate)

  • 김성민;이상렬
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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    • pp.392-396
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    • 1999
  • Superconducting YBa$_2Cu_3O_{7-{\delta}}$(YBCO) thin films were grown on Hastelloy(Ni-Cr-Mo alloys) with CeO$_2$ buffer layer in-situ by pulsed laser deposition in a multi-target processing chamber. To apply superconducting property on power transmission line, we have deposited YBCO thin film on flexible metallic substrate. However, it is difficult to grow the YBCO films on flexible metallic substrates due to both interdiffusion problem between metallic substrate and superconducting overlayers and non-crystallization of YBCO on amorphous substrate. It is necessary to use a buffer layer to overcome the difficulties. We have chosen CeO$_2$ as a buffer layer which has cubic structure of 5.41 ${\AA}$ lattice parameter and only 0.2% of lattice mismatch with 3.82 ${\AA}$ of a-axis lattice parameter of YBCO on [110] direction of CeO$_2$ In order to enhance the crystallization of YBCO films on metallic substrates, we deposited CeO$_2$ buffer layers with varying temperature and 02 pressure. By XRD, it is observed that dominated film orientation is strongly depending on the deposition temperature of CeO$_2$ layer. The dominated orientation of CeO$_2$ buffer layer is changed from (200) to(111) by increasing the deposition temperature and this transition affects the crystallization of YBCO superconducting film on CeO$_2$ buffered Hastelloy.

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CBD 방법에 의한 ZnS 버퍼층 형성의 착화제 농도에 따른 영향 (Effect of the Concentration of Complexing Agent on the Formation of ZnS Buffer Layer by CBD Method)

  • 권상직;유인상
    • 한국전기전자재료학회논문지
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    • 제30권10호
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    • pp.625-630
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    • 2017
  • ZnS was chemically deposited as a buffer layer alternative to CdS, for use as a Cd-free buffer layer in $Cu(In_{1-x}Ga_x)Se_2$ (CIGS) solar cells. The deposition of a thin film of ZnS was carried out by chemical bath deposition, following which the structural and optical properties of the ZnS layer were studied. For the experiments, zinc sulfate hepta-hydrate ($ZnSO_4{\cdot}7H_2O$), thiourea ($SC(NH_2)_2$), and ammonia ($NH_4OH$) were used as the reacting agents. The mole concentrations of $ZnSO_4$ and $SC(NH_2)_2$ were fixed at 0.03 M and 0.8 M, respectively, while that of ammonia, which acts as a complexing agent, was varied from 0.3 M to 3.5 M. By varying the mole concentration of ammonia, optimal values for parameters like optical transmission, deposition rate, and surface morphology were determined. For the fixed mole concentrations of $0.03M\;ZnSO_4{\cdot}7H_2O$ and $0.8M\;SC(NH_2)_2$, it was established that 3.0 M of ammonia could provide optimal values of the deposition rate (5.5 nm/min), average optical transmittance (81%), and energy band gap (3.81 eV), rendering the chemically deposited ZnS suitable for use as a Cd-free buffer layer in CIGS solar cells.

MOCVD 법에 의해 제조된 $CeO_2$ 버퍼층 증착 거동의 기판 의존성 (Substrate dependence of the deposition behavior of $CeO_2$ buffer layer prepared by MOCVD method)

  • 전병혁;최준규;정우영;이희균;홍계원;김찬중
    • Progress in Superconductivity
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    • 제7권2호
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    • pp.130-134
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    • 2006
  • Buffer layers such as $CeO_2\;and\;Yb_2O_3$ films for YBCO coated conductors were deposited on (100) $SrTiO_3$ single crystals and (100) textured Ni substrates by a metal organic chemical vapor deposition (MOCVD) system of the hot-wall type. The substrates were moved with the velocity of 40 cm/hr. Source flow rate, $Ar/O_2$ flow rate and deposition temperature were main processing variables. The degree of film epitaxy and surface morphology were investigated using XRD and SEM, respectively. On a STO substrate, the $CeO_2$ film was well grown epitaxially above the deposition temperature of $450^{\circ}C$. However, on a Ni substrate, the XRD showed NiO (111) and (200) peaks due to Ni oxidation as well as (111) and (200) film growth. For the films deposited with $O_2$ gas as oxygen source, it was found that the NiO film was formed at the interface between the buffer layer and the Ni substrate. The NiO layer interrupts the epitaxial growth of the buffer layer. It seems that the epitaxial growth of the buffer layer on Ni metal substrates using $O_2$ gas is difficult. We are considering a new method avoiding Ni oxidation with $H_2O$ vapor instead of $O_2$ gas.

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Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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고상 성장법을 이용한 실리콘 태양전지 에미터 형성 연구 (A Study on Solid-Phase Epitaxy Emitter in Silicon Solar Cells)

  • 김현호;지광선;배수현;이경동;김성탁;박효민;이헌민;강윤묵;이해석;김동환
    • Current Photovoltaic Research
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    • 제3권3호
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    • pp.80-84
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    • 2015
  • We suggest new emitter formation method using solid-phase epitaxy (SPE); solid-phase epitaxy emitter (SEE). This method expect simplification and cost reduction of process compared with furnace process (POCl3 or BBr3). The solid-phase epitaxy emitter (SEE) deposited a-Si:H layer by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD) on substrate (c-Si), then thin layer growth solid-phase epitaxy (SPE) using rapid thermal process (RTP). This is possible in various emitter profile formation through dopant gas ($PH_3$) control at deposited a-Si:H layer. We fabricated solar cell to apply solid-phase epitaxy emitter (SEE). Its performance have an effect on crystallinity of phase transition layer (a-Si to c-Si). We confirmed crystallinity of this with a-Si:H layer thickness and annealing temperature by using raman spectroscopy, spectroscopic ellipsometry and transmission electron microscope. The crystallinity is excellent as the thickness of a-Si layer is thin (~50 nm) and annealing temperature is high (<$900^{\circ}C$). We fabricated a 16.7% solid-phase epitaxy emitter (SEE) cell. We anticipate its performance improvement applying thin tunnel oxide (<2nm).

Improvement in the negative bias stability on the water vapor permeation barriers on Hf doped $SnO_x$ thin film transistors

  • 한동석;문대용;박재형;강유진;윤돈규;신소라;박종완
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2012년도 춘계학술발표대회
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    • pp.110.1-110.1
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    • 2012
  • Recently, advances in ZnO based oxide semiconductor materials have accelerated the development of thin-film transistors (TFTs), which are the building blocks for active matrix flat-panel displays including liquid crystal displays (LCD) and organic light-emitting diodes (OLED). However, the electrical performances of oxide semiconductors are significantly affected by interactions with the ambient atmosphere. Jeong et al. reported that the channel of the IGZO-TFT is very sensitive to water vapor adsorption. Thus, water vapor passivation layers are necessary for long-term current stability in the operation of the oxide-based TFTs. In the present work, $Al_2O_3$ and $TiO_2$ thin films were deposited on poly ether sulfon (PES) and $SnO_x$-based TFTs by electron cyclotron resonance atomic layer deposition (ECR-ALD). And enhancing the WVTR (water vapor transmission rate) characteristics, barrier layer structure was modified to $Al_2O_3/TiO_2$ layered structure. For example, $Al_2O_3$, $TiO_2$ single layer, $Al_2O_3/TiO_2$ double layer and $Al_2O_3/TiO_2/Al_2O_3/TiO_2$ multilayer were studied for enhancement of water vapor barrier properties. After thin film water vapor barrier deposited on PES substrate and $SnO_x$-based TFT, thin film permeation characteristics were three orders of magnitude smaller than that without water vapor barrier layer of PES substrate, stability of $SnO_x$-based TFT devices were significantly improved. Therefore, the results indicate that $Al_2O_3/TiO_2$ water vapor barrier layers are highly proper for use as a passivation layer in $SnO_x$-based TFT devices.

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Soda lime glass기판위의 barrier층$(SiO_2,\;Al_2O_3)$이 ITO박막특성에 미치는 영향 (Effect of ITO thin films characterization by barrier layers$(SiO_2\;and\;Al_2O_3)$ on soda lime glass substrate)

  • 이정민;최병현;지미정;안용태;주병권
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.292-292
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    • 2007
  • To apply PDP panel, Soda lime glass(SLG) is cheeper than Non-alkali glass and PD-200 glass but has problems such as low strain temperature and ion diffusion by alkali metal oxide. In this paper suggest the methode that prohibits ion diffusion by deposing barrier layer on SLG. Indium thin oxide(ITO) thin films and barrier layers were prepared on SLG substrate by Rf-magnetron sputtering. These films show a high electrical resistivity and rough uniformity as compared with PD-200 glass due to the alkali ion from the SLG on diffuse to the ITO film by the heat treatment. However these properties can be improved by introducing a barrier layer of $SiO_2\;or\;Al_2O_3$ between ITO film and SLG substrate. The characteristics of films were examined by the 4-point probe, SEM, UV-VIS spectrometer, and X-ray diffraction. GDS analysis confirmed that barrier layer inhibited Na and Ka ion diffusion from SLG. Especially ITO films deposited on the $Al_2O_3$ barrier layer had higher properties than those deposited on the $SiO_2$ barrier layer.

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열처리 조건에 따른 $HfO_2$/Hf/Si 박막의 MOS 커패시터 특성 (Characterization of $HfO_2$/Hf/Si MOS Capacitor with Annealing Condition)

  • 이대갑;도승우;이재성;이용현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.8-9
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    • 2006
  • Hafnium oxide ($HfO_2$) thin films were deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$. Prior to the deposition of $HfO_2$ films, a thin Hf ($10\;{\AA}$) metal layer was deposited. Deposition temperature of $HfO_2$ thin film was $350^{\circ}C$ and its thickness was $150\;{\AA}$. Samples were then annealed using furnace heating to temperature ranges from 500 to $900^{\circ}C$. The MOS capacitor of round-type was fabricated on Si substrates. Thermally evaporated $3000\;{\AA}$-thick AI was used as top electrode. In this work, We study the interface characterization of $HfO_2$/Hf/Si MOS capacitor depending on annealing temperature. Through AES(Auger Electron Spectroscopy), capacitance-voltage (C-V) and current-voltage (I-V) analysis, the role of Hf layer for the better $HfO_2$/Si interface property was investigated. We found that Hf meta1 layer in our structure effective1y suppressed the generation of interfacial $SiO_2$ layer between $HfO_2$ film and silicon substrate.

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Boron doping with fiber laser and lamp furnace heat treatment for p-a-Si:H layer for n-type solar cells

  • Kim, S.C.;Yoon, K.C.;Yi, J.S.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.322-322
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    • 2010
  • For boron doping on n-type silicon wafer, around $1,000^{\circ}C$ doping temperature is required, because of the relatively low solubility of boron in a crystalline silicon comparing to the phosphorus case. Boron doping by fiber laser annealing and lamp furnace heat treatment were carried out for the uniformly deposited p-a-Si:H layer. Since the uniformly deposited p-a-Si:H layer by cluster is highly needed to be doped with high temperature heat treatment. Amorphous silicon layer absorption range for fiber laser did not match well to be directly annealed. To improve the annealing effect, we introduce additional lamp furnace heat treatment. For p-a-Si:H layer with the ratio of $SiH_4:B_2H_6:H_2$=30:30:120, at $200^{\circ}C$, 50 W power, 0.2 Torr for 30 min. $20\;mm\;{\times}\;20\;mm$ size fiber laser cut wafers were activated by Q-switched fiber laser (1,064 nm) with different sets of power levels and periods, and for the lamp furnace annealing, $980^{\circ}C$ for 30 min heat treatment were implemented. To make the sheet resistance expectable and uniform as important processes for the $p^+$ layer on a polished n-type silicon wafer of (100) plane, the Q-switched fiber laser used. In consequence of comparing the results of lifetime measurement and sheet resistance relation, the fiber laser treatment showed the trade-offs between the lifetime and the sheet resistance as $100\;{\omega}/sq.$ and $11.8\;{\mu}s$ vs. $17\;{\omega}/sq.$ and $8.2\;{\mu}s$. Diode level device was made to confirm the electrical properties of these experimental results by measuring C-V(-F), I-V(-T) characteristics. Uniform and expectable boron heavy doped layers by fiber laser and lamp furnace are not only basic and essential conditions for the n-type crystalline silicon solar cell fabrication processes, but also the controllable doping concentration and depth can be established according to the deposition conditions of layers.

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Memory Effect of $In_2O_3$ Quantum Dots and Graphene in $SiO_2$ thin Film

  • Lee, Dong Uk;Sim, Seong Min;So, Joon Sub;Kim, Eun Kyu
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.240.2-240.2
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    • 2013
  • The device scale of flash memory was confronted with quantum mechanical limitation. The next generation memory device will be required a break-through for the device scaling problem. Especially, graphene is one of important materials to overcome scaling and operation problem for the memory device, because ofthe high carrier mobility, the mechanicalflexibility, the one atomic layer thick and versatile chemistry. We demonstrate the hybrid memory consisted with the metal-oxide quantum dots and the mono-layered graphene which was transferred to $SiO_2$ (5 nm)/Si substrate. The 5-nm thick secondary $SiO_2$ layer was deposited on the mono-layered graphene by using ultra-high vacuum sputtering system which base pressure is about $1{\times}10^{-10}$ Torr. The $In_2O_3$ quantum dots were distributed on the secondary $SiO_2$2 layer after chemical reaction between deposited In layer and polyamic acid layer through soft baking at $125^{\circ}C$ for 30 min and curing process at $400^{\circ}C$ for 1 hr by using the furnace in $N_2$ ambient. The memory devices with the $In_2O_3$ quantum dots on graphene monolayer between $SiO_2$ thin films have demonstrated and evaluated for the application of next generation nonvolatile memory device. We will discuss the electrical properties to understating memory effect related with quantum mechanical transport between the $In_2O_3$ quantum dots and the Fermi level of graphene layer.

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