• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.6
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• pp.615-628
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• 2015

CGRA (Coarse-Grained Reconfigurable Architecture) based multi-core architecture can be considered as a suitable solution for the fault-tolerant computing. However, there have been a few research projects based on fault-tolerant CGRA without exploiting the strengths of CGRA as well as their works are limited to single CGRA. Therefore, in this paper, we propose two approaches to enable exploiting the inherent redundancy and reconfigurability of the multi-CGRA for fault-recovery. One is a resilient inter-CGRA fabric that is ring-based sharing fabric (RSF) with minimal interconnection overhead. Another is a novel intra/inter-CGRA reconfiguration technique on RSF for maximizing utilization of the resources when faults occur. Experimental results show that the proposed approaches achieve up to 94% faulty recoverability with reducing area/delay/power by up to 15%/28.6%/31% when compared with completely connected fabric (CCF).

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.6
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• pp.1247-1254
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• 2020

With the advent of the smart home era, equipment that provides confidentiality or performs authentication exists in various places in real life. Accordingly security against physical attacks is required for encryption equipment and authentication equipment. In particular, fault injection attack that artificially inject a fault from the outside to recover a secret key or bypass an authentication process is one of the very threatening attack methods. Fault sources used in fault injection attacks include lasers, electromagnetic, voltage glitches, and clock glitches. Fault injection attacks are classified into single fault injection attacks and multiple fault injection attacks according to the number of faults injected. Existing multiple fault injection systems generally use a single fault source. The system configured to inject a single source of fault multiple times has disadvantages that there is a physical delay time and additional equipment is required. In this paper, we propose a multiple fault injection system using heterogeneous fault sources. In addition, to show the effectiveness of the proposed system, the results of a multiple fault injection attack against Riscure's Piñata board are shown.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.35 no.6
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• pp.526-532
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• 2007

This paper considers a fault tolerant control problem for a spacecraft using reaction wheels. Faults are assumed to be inherent to only actuators(reaction wheels) and a control algorithm to accommodate actuators' faults is proposed. An attitude control loop includes an angular velocity control loop. The time delay control method is used to make a spacecraft follow the command angular velocity and to accommodate actuators' faults. A stability condition for the proposed algorithm is derived and the performance is demonstrated by computer simulations.

• Journal of the Korean Institute of Intelligent Systems
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• v.22 no.2
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• pp.148-153
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• 2012

In this paper, we propose a fault-tolerant QoS routing scheme based on interference awareness for providing both high throughput and minimum end-to-end delay for wireless sensor networks. With the proposed algorithm, it is feasible to find out the optimal transmission path between sensor nodes to the sink node by using cumulative path metric where real-time delivery, high energy efficiency and less interference are considered as in path selection. Finally, simulation results show that network throughput and delay can be improved by using the proposed routing scheme.

• Journal of Institute of Control, Robotics and Systems
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• v.17 no.10
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• pp.967-982
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• 2011

This paper presents a FTNCS (Fault-Tolerant Networked Control System) that can tolerate control surface failure and packet delay/loss in an UAV (Unmanned Aerial Vehicle). The proposed method utilizes the benefits of self-diagnosis by smart actuators along with the control allocation technique. A smart actuator is an intelligent actuation system combined with microprocessors to perform self-diagnosis and bi-directional communications. In the event of failure, the smart actuator provides the system supervisor with a set of actuator condition data. The system supervisor then compensate for the effect of faulty actuators by re-allocating redundant control surfaces based on the provided actuator condition data. In addition to the compensation of faulty actuators, the proposed FTNCS also includes an efficient algorithm to deal with network induced delay/packet loss. The proposed algorithm is based on a Lagrange polynomial interpolation method without any mathematical model of the system. Computer simulations with an UAV show that the proposed FTNCS can achieve a fast and accurate tracking performance even in the presence of actuator faults and network induced delays.

• Journal of information and communication convergence engineering
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• v.10 no.3
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• pp.231-236
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• 2012

For real-time wireless sensor network applications, it is essential to provide different levels of quality of service (QoS) such as reliability, low latency, and fault-tolerant traffic control. To meet these requirements, an (m,k)-firm based real-time routing protocol has been proposed in our prior work, including a novel local transmission status indicator called local DBP (L_DBP). In this paper, a fault recovery scheme for (m,k)-firm real-time streams is proposed to improve the performance of our prior work, by contributing a delay-aware forwarding candidates selection algorithm for providing restricted redundancy of packets on multipath with bounded delay in case of transmission failure. Each node can utilize the evaluated stream DBP (G_DBP) and L_DBP values as well as the deadline information of packets to dynamically define the forwarding candidate set. Simulation results show that for real-time service, it is possible to achieve both reliability and timeliness in the fault recovery process, which consequently avoids dynamic failure and guarantees meeting the end-to-end QoS requirement.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.194-196
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• 2005

The command processor in satellite handles the capability of the process of command transmitted from ground station and deliver the processed data to on board computer in satellite. The command processor is consisted of redundant box to increase the reliability and availability of the capability. At each command processor, the processing time of each command processor is different, so the mismatch of processing time makes it difficult to timely synchronize the reception to on board computer and even will be became worse under the command processor's fault. To minimize the tine loss induced by the command processor's fault on board computer must analyze the time distribution of command propagation. This paper presents the logic of minimizing the delay error of command propagation the logic of analyzing the output of command processor.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.229-240
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• 1995

This paper proposes a new weighted random pattern testing technique to detect path delay faults in combinational logic circuits. When computing the probability of signal transition at primitive logic elements of CUT(Circuit Under Test) by the primary input, the proposed technique uses the information on the structure of CUT for initialization vectors and vectors generated by pseudo random pattern generator for test vectors. We can sensitize many paths by allocating a weight value on signal lines considering the difference of the levels of logic elements. We show that the proposed technique outperforms existing testing method in terms of test length and fault coverage using ISCAS '85 benchmark circuits. We also show that the proposed testing technique generates more robust test vectors for the longest and near-longest paths.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.8
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• pp.1-10
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• 1994

In this paper load redistribution algorithm to allow fault-tolerance by redistributing the workload of n failure nodes to the remaining good nodes in distributed systems are investigated. To evaluate the efficiency of the algorithms a simulation model of algorithms is developed using SLAM II simulation language. The job arrival rate service rate failure and repair rate of nodes and communication delay time due to load migraion are used as parameters. The result of the simulation shows that the job arrival rate failure and repair rate of nodes do not affected on the relative efficiency of algorithms. If the communication delay time is greater than average job processing time algorithm B is better. Otherwise algorithm C is superior to the others.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.501-502
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• 2007

This paper describes a distance relay that operates in conjunction with a current transformer (CT) compensation algorithm. A distance relay detects a fault based on the ratio of the voltage to the current. If a CT saturates, the calculated impedance becomes larger. This causes maloperation or operating time delay of the distance relay. A compensating algorithm estimates the correct secondary current from the severely distorted currents even when the measurement CTs are used. The correct current is estimated by adding the calculated magnetizing current to the measured secondary current. Test results show that the proposed distance relay can detect a fault without the operating time delay even when the secondary currents are extremely distorted because of use of measurement CTs.