• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 정기총회 및 추계학술대회 논문집 학회본부
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• pp.293-295
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• 1993

In this paper, Neural-Network Identifier that has time-delay element, error limit and small weighting factor is proposed. A proposed identifier has good performance to identify non-linear system with noise. To test the effectiveness of the algorithm presented above, the simulation for output tracking of non-linear system is implemented.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(1)
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• pp.5-8
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• 2002

In this paper, we are designed and verified a FFT/IFFT processor that is possible from the wireless LAN environment which is adopted international standard of the IEEE802.11a. The proposed architecture of the FFT/IFFT has Radix-2 64point SDF(single-path delay feedback) Pipeline technique and DIF(Decimation in Frequenct) structure. The FFT/IFFT processor has each 8 bit complex input-output and 6 bit Twiddle factor. we used Max-PlusII for simulation and can see that processor is properly operated

• Journal of Power Electronics
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• 제4권1호
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• pp.56-63
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• 2004

A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once in every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(1)
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• pp.23-26
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• 2004

This paper analyzed time delay and phase distortion that generates in multipath and the degree of distortion due to power attenuation factor when UWB system is applied at indoor environment and the effects of indoor structure and material on distortion factors. Based on these distortion factors, channel model similar to actual environment is mathematically described and multipath and the degree of signal distortion generated when UWB system is applied to random environment is tested through channel model simulation and varies distortion factor that UWB system needs to consider in different indoor environment is analyzed.

• 한국통신학회논문지
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• 제26권11B호
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• pp.1540-1545
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• 2001

This paper is concerned with the reverse link performance of multi-code CDMA systems in multipath fading environments. The degree of orthogonality loss among multiple spreading code channels is characterized as the orthogonality factor. It depends on various system parameters including multipath power profiles of propagation channels and the number of Paths resolved at a Rake receiver. The effect of the parameters on the system performance is then investigated in terms of bit error rate and required signal quality. The results show that multipath delay power profiles dominantly affect mutual interference among multi-code channels and multipath combining gain by bandwidth expansion is not so great due to the increase of the mutual interference. Moreover, the orthogonality factor is derived as the value of between (1/m) and 1.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.1002-1007
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• 2003

A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once In every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently.

• Journal of Power Electronics
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• 제13권4호
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• pp.600-608
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• 2013

This paper analyzes the effect of the admittance component for the digitally controlled single-phase bridgeless power factor correction (PFC) converter. To do this, it is shown how the digital delay effects such as the digital pulse-width modulation (DPWM) and the computation delays restrict the bandwidth of the converter. After that, the admittance effect of the entire digital control system is analyzed when the bridgeless PFC converter which has the limited bandwidth is connected to the grid. From this, the waveform distortion of the input current is explained and the compensation method for the admittance component is suggested to improve the quality of the input current. Both the simulations and the experiments are performed to verify the analyses taken in this paper for the 1 kW bridgeless PFC converter prototype.

• 전기학회논문지
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• 제56권11호
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• pp.2010-2016
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• 2007

PID control is windely used to control stable processes, However, its application to integrating processes is less common. In this paper, we proposed a stable PID controller tuning method for integrating processes with time delay using model reduction method. For proposed model reduction method, it disconnect an integrating factor from integrating processes and reduces separate process using reduction method. and it connect an integrating factor to reduced model. We can obtain stable integrating processes using P controller in inner feedback loop and PID tuning is then used to cancel the pole of the feedback loop. This guarantees both robustness and performance. Simulation examples are given to show the good performance of the proposed tuning method comparing with other methods.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.207-209
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• 2018

본 논문은 고효율 및 고전력밀도 3-레벨 PFC(Power Factor Correction) 컨버터를 제안한다. 기존 PFC의 고 전력밀도를 위한 스위칭 주파수 상승은 스위칭 특성이 우수한 소자를 적용하거나, 별도의 스너버 회로가 요구되므로 설계가 복잡하며 고전력밀도 달성에 한계가 있다. 제안 PFC 컨버터는 3-레벨 방식을 적용하여 각 스위칭 소자의 전압 스트레스를 절반으로 감소시켰으며, 스위치 손실 저감을 통한 고속 스위칭 동작으로 리액티브 소자의 고밀도화를 달성하였다. 또한, 기존의 3-레벨방식은 디지털 제어를 통해 스위칭 소자의 전압 평형이 이루어졌지만, 본 논문에서는 아날로그 IC에 전압 평형을 위한 RC Delay 회로와 소수의 SMD(Surface-mount devices) 소자만을 이용하여 별도의 제어회로 없이 전압 평형이 가능하므로 고 전력밀도 달성에 유리하다. 제안회로의 타당성을 검증하기 위해 CRM(Critical conduction mode) PFC 컨버터를 기반으로 250W급 시작품 제작을 통한 실험 결과를 제시한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 B
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• pp.1151-1154
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• 2000

Phase angle control ac drives system gains a high popularity due to their simple implementation despite the disadvantage of their poor input power factor especially for large values of phase delay angle. Furthermore it generates subharmononic current at specific phase angle. As input current of do drive systems are sinusoidal, the power factor and subharmonic current characteristics are improve. This paper presents the application of a PWM control technique of do chopper system to reduce the subharmonic current and its characteristics using single-phase dc chopper drive system of universal motor.