• 대한전자공학회논문지TC
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• 제48권7호
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• pp.9-16
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• 2011

본 논문에서는 높은 처리율을 가지는 다양한 터보 복호 방식을 소개하고 각각의 장점을 기반으로 한 새로운 고속 터보 복호 기법을 제안한다. 제안된 기법은 기본적으로 슬라이딩 윈도우, 복류 복호, 셔플 복호 방식을 사용하며 모의실험 결과, 제안된 기법은 기존의 방법에 비해서 적은 클록 사이클로도 동일한 BER 성능을 얻을 수 있음을 확인하였다. 게다가 슬라이딩 윈도우 크기를 적절하게 조정하면 메모리 사용량도 줄일 수 있음을 확인하였다. 따라서 본 논문에서 제안한 터보 복호 기법을 사용함으로써 저 전력, 저 면적의 고속 터보 복호기의 설계가 가능하다.

• ETRI Journal
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• 제34권5호
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• pp.719-726
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• 2012

Messages are generally selected with the same probability in the encoding scheme of rateless codes for equal error protection. In addition, a belief propagation (BP) decoding scheme is generally used because of the low computational complexity. However, the probability of recovering a new message by BP decoding is reduced if both the recovered and unrecovered messages are selected uniformly. Thus, more codeword symbols than expected are required for the perfect recovery of message symbols. Therefore, a new encoding scheme with a nonuniform selection of messages is proposed in this paper. In addition, a BP-Gaussian elimination hybrid decoding scheme that complements the drawback of the BP decoding scheme is proposed. The performances of the proposed schemes are analyzed and compared with those of the conventional schemes.

• 한국통신학회논문지
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• 제30권6C호
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• pp.450-456
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• 2005

In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

• ETRI Journal
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• 제35권5호
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• pp.767-774
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• 2013

In this paper, a novel parallel Viterbi decoding scheme is proposed to decrease the decoding latency and power consumption for the software-defined radio (SDR) system. It implements a divide-and-conquer approach by first dividing a block into a series of subblocks, then performing independent Viterbi decoding for each subsequence, and finally merging the surviving subpaths into the final path. Moreover, a network-on-chip-based SDR platform is used to evaluate the performance of the proposed parallel Viterbi decoding scheme. The experiment results show that our scheme can speed up the Viterbi decoding process without increasing the BER, and it performs better than the current state-of-the-art methods.

• Journal of Communications and Networks
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• 제17권4호
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• pp.351-361
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• 2015

In this paper, a new decoding scheme is proposed to improve the error correcting performance of low-density parity-check (LDPC) codes in high signal-to-noise ratio (SNR) region by using post-processing. It behaves as follows: First, a conventional LDPC decoding is applied to received LDPC codewords one by one. Then, we count the number of word errors in a predetermined number of decoded codewords. If there is no word error, nothing needs to be done and we can move to the next group of codewords with no delay. Otherwise, we perform a proper post-processing which produces a new soft-valued codeword (this will be fully explained in the main body of this paper) and then apply the conventional LDPC decoding to it again to recover the unsuccessfully decoded codewords. For the proposed decoding scheme, we adopt a simple product code structure which contains LDPC codes and simple algebraic codes as its horizontal and vertical codes, respectively. The decoding capability of the proposed decoding scheme is defined and analyzed using the parity-check matrices of vertical codes and, especially, the combined-decodability is derived for the case of single parity-check (SPC) codes and Hamming codes used as vertical codes. It is also shown that the proposed decoding scheme achieves much better error correcting capability in high SNR region with little additional decoding complexity, compared with the conventional LDPC decoding scheme.

• Journal of Communications and Networks
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• 제15권4호
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• pp.411-421
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• 2013

Digital fountain codes are record-breaking codes for erasure channels. They have many potential applications in both wired and wireless communications. Most existing digital fountain codes operate over binary fields using an iterative belief-propagation (BP) decoding algorithm. In this paper, we propose a new iterative decoding algorithm for both binary and nonbinary fields. The basic form of our proposed algorithm considers both degree-1 and degree-2 check nodes (instead of only degree-1 check nodes as in the original BP decoding scheme), and has linear complexity. Extensive simulation demonstrates that it outperforms the original BP decoding scheme, especially for a small number of source packets. The enhanced form of the proposed algorithm combines the basic form of the algorithm and a guess-based algorithm to further improve the decoding performance. Simulation results demonstrate that it can provide better decoding performance than the guess-based algorithm with fewer guesses, and can achieve decoding performance close to that of the maximum likelihood decoder at a much lower decoding complexity. Last, we show that our nonbinary scheme has the potential to outperform the binary scheme when choosing suitable degree distributions, and furthermore it is insensitive to the size of the Galois field.

• Journal of information and communication convergence engineering
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• 제6권1호
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• pp.1-5
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• 2008

In this paper, we propose and analyze the AMC (Adaptive Modulation and Coding) system with efficient turbo coded V-BLAST (Vertical-Bell-lab Layered Space-Time) technique. The proposed algorithm adopts extrinsic information from a MAP (Maximum A Posteriori) decoder with iterative decoding as a priori probability in two decoding procedures of V-BLAST scheme; the ordering and the slicing. Also, we consider the AMC system using the conventional turbo coded V-BLAST technique that simply combines the V-BLAST scheme with the turbo coding scheme. And we compare the proposed decoding algorithm to a conventional V-BLAST decoding algorithm and a ML (Maximum Likelihood) decoding algorithm. In addition, we apply a STD (Selection Transmit Diversity) scheme to the systems for better performance improvement. Results indicate that the proposed systems achieve better throughput performance than the conventional systems over the entire SNR range. In terms of transmission rate performance, the suggested system is close in proximity to the conventional system using the ML decoding algorithm.

• 대한전자공학회논문지TC
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• 제39권11호
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• pp.12-20
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• 2002

본 논문에서는 다중레벨 부호변조를 내부구성부호로 사용하고 길쌈부호를 외부구성부호로 사용하는 직렬연접 다중레벨 부호변조가 제안된다. 그리고 제안된 직렬연접 다중레벨 부호변조의 세 가지 복호방안에 대한 성능이 비교 및 분석된다. 모의실험 결과 제안된 직렬연접 다중레벨 부호변조에서 반복복호 횟수의 증가에 따라 그 성능을 향상시키기 위해서는 내부구성부호와 외부구성부호사이의 반복복호가 수행되어야 한다. 그리고 본 논문에서 제시된 세 가지 방안 중에서 내부 다중레벨 부호변조의 반복적 다단계복호와 내부구성부호와 외부구성부호사이의 반복복호를 모두 수행하는 Scheme 3의 오류성능이 가장 우수하였다. 또한 Scheme 3과 다른 방안들과의 성능차이는 신호 대 잡음비가 증가할수록 더욱 증가하였다. 그러므로 직렬연접 다중레벨 부호변조의 복호방안으로는 Scheme 3이 적합하리라 사료된다.

• ETRI Journal
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• 제25권2호
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• pp.144-147
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• 2003

We propose a new serial concatenation scheme for space-time and recursive convolutional codes, in which a space-time code is used as the outer code and a single recursive convolutional code as the inner code. We discuss previously proposed serial concatenation schemes employing multiple inner codes and compare them with the new one. The proposed method and the previous one with joint decoding, both performing a combined decoding of the simultaneous output signals from multiple antennas, give a large performance gain over the separate decoding method. In decoding complexity, the new concatenation scheme has a lower complexity compared with the multiple encoding/joint decoding scheme due to the use of the single inner code. Simulation results for a communication system with two transmit and one receive antennas in a quasi-static Rayleigh fading channel show that the proposed scheme outperforms the previous schemes.

• 한국정보전자통신기술학회논문지
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• 제12권1호
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• pp.37-42
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• 2019

본 논문에서는 부호 길이 내에서 1개의 오류를 정정할 수 있는 해밍 부호(Hamming code)에 대해 2 개의 오류를 정정할 수 있는 신드롬 복호 기법을 제안하였다. 본 논문에서 제안한 복호 기법은 복호 복잡도를 거의 증가시키지 않으면서도 다중 오류를 정정함으로서 복호 복잡도 대비 오율 성능을 크게 개선할 수 있는 장점을 갖는다. 본 논문에서 제안한 복호 기법은 IoT 기기들 간의 통신이나 분자 통신과 같이 부/복호기에서 에너지의 사용이 극히 제한된 환경에서 부 복호기의 에너지 사용이 적으면서도 우수한 오율 성능이 요구되는 경우에 적합하다. 본 논문에서 제안한 복호 기법이 적용된 해밍 부호의 오율 성능이 개선되었음을 보이기 위해 BPSK 변조 방식과 AWGN 채널 환경에서 부호 길이가 짧은 다수의 해밍 부호에 대해 시뮬레이션을 수행하였으며, 수행 결과 해밍 부호의 부호 길이에 무관하게 제안한 복호 방식은 기존 복호 방식에 비해 약 1.1[dB] ~ 1.2[dB] 정도의 성능 개선을 확인할 수 있었다.