• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.273-276
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• 2001

In this thesis we propose symbol-based decoding for turbo codes which is used SOVA as a decoding algorithm. The proposed turbo codes that is interleaved on symbol-by-symbol basis and inputted as n-bit symbols to the decoder. This method makes that the stages of the original trellis are merged together and the trellis depth is reduced by 1/n. We research turbo codes with symbol size n=2 in this paper and its performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.1C
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• pp.37-47
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• 2011

In this paper, we propose a novel ML decoding scheme based on the combination of depth- and breadth-first search methods on a partitioned tree for multiple input multiple output systems. The proposed scheme first partitions the searching tree into several stages, each of which is then searched by a depth- or breadth-first search method, possibly exploiting the advantages of both the depth- and breadth-first search methods in an organized way. Numerical results indicate that, when the depth- and breadth-first search algorithms are adopted appropriately, the proposed scheme exhibits substantially lower computational complexity than conventional ML decoders while maintaining the ML bit error performance.

• Current Optics and Photonics
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• v.5 no.1
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• pp.23-31
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• 2021

We propose a wheel screen type Lamina 3D display, which realizes a 3D image that can satisfy the accommodation cue by projecting volumetric images encoded by varying polarization states to a multilayered screen. The proposed system is composed of two parts: an encoding part that converts depth information to states of polarization and a decoding part that projects depth images to the corresponded diffusing layer. Though the basic principle of Lamina displays has already been verified by previous studies, those schemes suffered from a bottleneck of inferior resolution of the 3D image due to the blurring on the surfaces of diffusing layers in the stacked volume. In this paper, we propose a new structure to implement the decoding part by adopting a form of the wheel screen. Experimental verification is also provided to support the proposed principle.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.157-160
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• 2000

In order to design a low complexity and high performance SOVA decoder for Turbo Codes, we need to analyze the decoding performance with respect to several important design parameters and find out optimal values for them. Thus, we use a scaling factor of soft output and a update depth as the parameters and analyze their effect on the BER performance of the SOVA decoder. finally, we shows the optimal values of them for maximum decoding performance of SOVA decoder for 3GPP complied Turbo codes.

• Journal of Communications and Networks
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• v.5 no.1
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• pp.1-6
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• 2003

In this paper, we extend the derivation of the iterative soft-output Viterbi algorithm (SOVA) for partial response (PR) channels, and modify its decoding process such that it works consistently for arbitrary high code rates, e.g., rate 64/65. We show that the modified SOVA always outperforms the conventional SOVA that appears in the literature with a significant difference for high code rates. It also offers a significant cut down in the trace-back computations. We further examine its performance for parallel and serial concatenated codes on a precoded Class IC partial response (PR4) channel. Code rates of the form $\frac{k_0}{k_0+1}$($k_0$ = 4, 8, and 64) are considered. Our simulations indicate that the loss suffered by the modified SOVA, relative to the APP algorithm, is consistent for all code rates and is at most 1.2 dB for parallel concatenations and at most 1.6 dB for serial concatenations at $P_b$ = $10^{-5}$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.36-44
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• 2003

This paper proposes a Viterbi decoding scheme without trace-back operations to reduce the amount of memory storing the survivor path information, and to increase the decoding speed. The proposed decoding scheme is a modified register exchange scheme, and is verified by a simulation to give the same results as those of the conventional decoders. It is compared with the conventional decoding schemes such as the trace-back and the register exchange scheme. The memory size of the proposed scheme is reduced to 1/(5 x constraint length) of that of the register exchange scheme, and the throughput is doubled compared with that of the trace-back scheme. A decoder with a code rate of 2/3, a constraint length, K＝3 and a trace-back depth of 15 is designed using VHDL and implemented in an FPGA. It is also shown that the modified register exchange scheme can be applied to a block decoding scheme.

• Journal of the Institute of Convergence Signal Processing
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• v.2 no.2
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• pp.62-67
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• 2001

In the recent mobile communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that need a large time delay over the reception process. Moreover, Turbo Code has been known as the robust ending method with the confidence over the fading channel. The International Telecommunication Union(ITU) has recently adopted as the standardization of the channel coding over the third generation mobile communications such as IMT-2000. Therefore, in this paper, we proposed of the method to improve the conventional performance with the parallel concatenated 4-New Turbo Decoder using MAP a1gorithm in spite of complexity increasement. In the real-time video and video service over the third generation mobile communications, the performance of the proposed method was analyzed by the reduced decoding delay using the variable decoding method by computer simulation over AWGN and fading channels.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.07a
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• pp.396-398
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• 2011

본 논문은 두 대의 카메라와 한 대의 프로젝터로 구성된 Pro-cam시스템을 이용하여, 출력된 패턴 영상을 카메라로 촬영하고 이를 기반으로 Depth Map을 계산하는 모듈의 실시간 처리를 위한 GPU기반 병렬처리 기법을 제안한다. 입력받은 영상으로부터 구조광의 패턴을 해석하고, Depth Map을 계산하기 위해서, Dynamic pattern decoding하는 과정은 프로젝터의 패턴영상과 촬영된 카메라 패턴영상 간의 관계를 반복적으로 비교하므로, 이를 GPU 프로그래밍을 이용하여 병렬 처리를 통해 고속화하였다. 결과적으로 본 논문에서는 기존 CPU에서 수행했던 속도에 비해 약 18배정도 속도를 개선 할 수 있었다.

• 한국정보통신설비학회:학술대회논문집
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• 2005.08a
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• pp.417-421
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• 2005

In the recent digital communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that needs many delays over the reception process. Moreover, turbo code has been known as the robust coding methods with the confidence over the fading channel. International Telecommunication Union(ITU) has recently adopted it as the standardization of the channel coding over the third generation mobile communications(IMT-2000). Therefore, in this paper, we proposed the interleaver that has the better performance than existing block interleaver, and modified turbo decoder that has the parallel concatenated structure using MAP algorithm. In the real-time voice and video service over third generation mobile communications, the performance of the proposed two methods was analyzed and compared with the existing methods by computer simulation in terms of reduced decoding delay using the variable decoding method over AWGN and fading channels for CDMA environments.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.285-288
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• 1998

Viterbi docoder is a maximum likelihood decoding method for convolution coding used in satellite and mobile communications. In this paper, a Viterbi decoder with constraint length of K=7, 3-soft decision and traceback depth of $\Gamma$=96 for convolution code is implemented using VHDL. The hardware size of designed decoder is reduced by 4 bit pre-traceback in the survivor memory.