• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1026-1028
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• 2001

In this paper, proposal circuit proposes that load parallel resonant DC-DC Converter consist of L and C resonant tank circuit. Also, the capacitor$(C_1,\;C2)$ connected in switch are a common using by resonance capacitor and ZVS capacitor. The analysis of proposed circuit uses normalized parameter and characteristic estimation which is needed in each step before design is generally described the proposed circuit with the characteristics of average power and average output voltage etc. Alse, we conform a rightfulness theoretical analysis by comparing a theoretical values and experimental values obtained from experiment using MOSFET as switching devices.

• Journal of Power Electronics
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• v.18 no.3
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• pp.651-661
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• 2018

This paper suggests a new non-isolated high voltage gain DC-DC converter with two switches. The proposed two-switch converter has the following characteristics: a high voltage gain, a continuous input current with a small ripple, a reduction in the size of the inductor, and a simple circuit with only a few elements. A theoretical analysis, guidelines for parameter selection, and a comparison with conventional non-isolated high step-up converters are presented. A prototype of 250 W is set up to demonstrate the correctness of the proposed converter. Results obtained from simulations and experiments are presented.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.383-386
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• 1990

This paper concerns a DC-DC converter using the characteristic of series resonance. Operation principle of the system described by the proposed equation is illustrated. Characteristics of steady state of the system which is essential to system design is evaluated for frequency and pulse width characteristic using dimensionless parameter. The proposed circuit based in constant voltage control uses the Pulse Width Modulation - Time Ratio Control method.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2033-2035
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• 1998

This paper describes a DC-DC converter connected two unites inverters, a half-bridge type of high frequency resonance inverter, at the input with parallel. The proposed paper certified that theorem waveforms are equal to experiment waveforms, in addition, it estimated characteristics such as characteristic of average power, characteristic of average output voltage, characterisic of output voltage ripple etc., for designing the device with normalized parameter value.

• Journal of Electrical Engineering and Technology
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• v.5 no.1
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• pp.171-178
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• 2010

Resonant parametric perturbation (RPP) method is an effective non-feedback method for controlling chaos. In this paper, the above method is applied for the current programmed buck-boost dc-dc converter which exhibits chaotic for wide parameter variations. The different possible operating regimes leading to chaotic operation of the current mode controlled buck-boost converter is discussed and the control of chaos by RPP method is demonstrated through computer simulations and experimental studies. The converter is stabilized to period 1 operation practically.

• Journal of Electrical Engineering and Technology
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• v.11 no.1
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• pp.143-149
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• 2016

The two-stage converter is widely used in traditional DC/AC inverter. It has several disadvantages such as complex topology, large volume and high loss. In order to overcome these shortcomings, a novel half load-cycle worked dual SEPIC single-stage inverter, which is based on the analysis of the relationship between input and output voltages of SEPIC converters operating in the discontinuous conduction mode (DCM), is presented in this paper. The traditional single-stage inverter has remarkable advantages in small and medium power applications, but it can’t realize boost DC/AC output directly. Besides one pre-boost DC/DC converter is needed between the DC source and the traditional single-stage inverter. A novel DC/AC inverter without pre-boost DC/DC converter, which is comprised of two SEPIC converters, is studied. The output of dual SEPIC converters is connected with anti-parallel and half load-cycle control is used to realize boost and buck DC/AC output directly and work properly, whatever the DC input voltage is higher or lower than the AC output voltage. The working principle, parameter selection and the control strategy of the inverters are analyzed in this paper. Simulation and experiment results verify the feasibility of the new inverter.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1324-1326
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• 2000

This paper proposes a Current-Fed Push Pull type DC-DC converter using LCCC Resonant circuit and Zero Voltage Switching function to reduce turn on and off loss at the switching instants. This paper have the advantage which is able to operating safely in load short, because of DC reactor is connected with resonance reactor in order to supply a fixed current with low ripple from DC Power supply. The capacitor ($C_1$, $C_2$) connected in switch are common using as resonance capacitor and ZVS capacitor. The analysis of the proposed Current-Fed Push Pull type DC-DC converter is generally described by using normalized parameter, and we have evaluated characteristic values which is needed to design a circuit. We confirm a rightfulness theoretical analysis by comparing a theoretical values and experimental values obtained from experiment using MOSFET as switching devices.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.6
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• pp.449-456
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• 2009

The RMS(Root Mean Square) current stress reduction technique for the PFC link capacitor is proposed. Although the various parameter is exist for optimizing the link capacitor, the RMS current stress is the most weighty practical parameter. The proposed C-L filter can reduce effectively the RMS current stress by filtering the output current. And with the C-L-L-C filter proposed in this paper, the more RMS current stress can be reduce because it filters not only the output current, like C-L filter, but also the input current of DC/DC stage. The proposed filter is simple to design and have no effect on the control part of the PFC because of the very low crossover frequency. To confirm the validity of proposed filter, theoretical analysis, the design guide, verification of experimental results are presented.

• Journal of Electrical Engineering and Technology
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• v.13 no.4
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• pp.1566-1577
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• 2018

This paper presents a stability analysis of AC-DC power system feeding a speed controlled DC motor in which this load behaves as a constant power load (CPL). A CPL can significantly degrade power system stability margin. Hence, the stability analysis is very important. The DQ and generalized state-space averaging methods are used to derive the mathematical model suitable for stability issues. The paper analyzes the stability of power systems for both speed control natural frequency and DC-link parameter variations and takes into account controlled speed motor dynamics. However, accurate DC-link filter and DC motor parameters are very important for the stability study of practical systems. According to the measurement errors and a large variation in a DC-link capacitor value, the system identification is needed to provide the accurate parameters. Therefore, the paper also presents the identification of system parameters using the adaptive Tabu search technique. The stability margins can be then predicted via the eigenvalue theorem with the resulting dynamic model. The intensive time-domain simulations and experimental results are used to support the theoretical results.

• Journal of Power Electronics
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• v.14 no.4
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• pp.695-703
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• 2014

In this paper, a fault detection scheme for DC-link voltage sensor and its fault tolerant control strategy for three-phase AC/DC/AC PWM converters are proposed, where the Luenberger observer is applied to estimate the DC-link voltage. The Luenberger observer is based on a converter model, which is derived from the voltage equations of a grid-side converter and the power balance on a DC link. A fault of the voltage sensor is detected by comparing the measured value of the DC-link voltage with the estimated one. When a sensor fault is detected, a fault tolerant control strategy is performed, where the estimated DC-link voltage is used for the feedback control. The estimation error from the observer is about 1.5 V, which is sufficiently accurate for feedback control. In addition, it is shown that the observer performance is robust to parameter variations of the converter. The validity of the proposed method has been verified by simulation and experimental results.