• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.2
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• pp.187-195
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• 1999

A series feedback DRO operating at 3.2 GHz applicable to the spectrum analyzer as the second local oscillator, is designed and fabricated. We can obtain a low noise by utilizing the small signal S-parameter of the transistor and adjusting the reflection coefficient from the coupling coefficient between dielectric resonator and microstrip line. The results show that output power is 10.50 dBm, a stable low phase noise is -116 dBc/Hz at a 10 kHz offset frequency and a harmonic characteristic is 19.33 dBc.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.6
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• pp.816-824
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• 1999

Design and performance of 18 GHz phase locked dielectric resonator oscillator(PLDRO) for Point-to-point radio link using analog phase locked loop is described which achieve high stability and low SSB phase noise. The module consists of an 18 GHz voltage controlled dielectric resonator oscillator(VCDRO), buffered amplifier, analog phase detector which are integrated to form a miniature hybrid circuit. In addition, containing a low phase noise VHF PLL has been designed to lock any other conventional N times frequency of crystal oscillator. The module achieves stable phase locked state, exhibits output power of 21 dBm at 18.00 GHz, -34 dBc harmonic suppression and -75 dBc/Hz phase noise at 10 kHz offset frequency from carrier.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.1 no.1
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• pp.1-9
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• 2002

In this paper, a DRO (Dielectric Resonator Oscillator) with high stability in DSRC(Dedicated Short Range Communication) is designed and fabricated. The DRO shows the phase noise characteristic of -109.3 dBc/Hz at 100 kHz offset from the fundamental frequency. The output power of 11.53 dBm, and the second harmonic suppression of 55.33 dBc for the DRO are obtained. This DRO with high stability of the phase noise characteristic can be used for the system in DSRC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.5
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• pp.715-722
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• 2000

In this paper, the PLDRO is designed and implemented for X-band. It is comprised of tunable high Q resonator with a varactor diode for frequency tuning, loop filter and a 1/8 prescaler which up to 10GHz. Also, it is implemented a TCXO and a VCO signal into the phase detector and achieved a highly stable signal source. From the measurement, the designed PLDRO has the output power of 2.5dBm at 8GHz and phase noise of -64.33dBc at 10KHz offset from carrier. Its characteristic is 26 dBc. This PLDRO has much better temperature stability.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.9B
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• pp.1635-1640
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• 2000

In this paper, a 18 GHz oscillator is designed with the push-push method an fabricated by semi-MMIC process, in which the second harmonic is the main output signal with the suppressed fundamental mode. In semi-MMIC process, passive components with microstrip transmission line are implemented using MMIC process on semi-insulating GaAs substrate. Then, chip types of P-HEMT, resistors, and capacitors are connected through Au wire-bonding. Also, the ground plane is inserted around the circuit and connected each other with the back-side of substrate through Au wire-bonding instead of via-hole. The semi-MMIC push-push oscillator shows the output powder of -10.5 dBm, the fundamental frequency suppression of -17.3 dBc/Hz, and the phase noise of -97.9 dBc/Hz at the offset frequency of 100 kHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.1
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• pp.74-79
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• 2002

The EM(Engineering Model) VCO(Voltage Controlled Oscillator) is nonlinear designed for LO(Local Oscillator) of Ka-band satellite transponder. The microstripline coupled with dielectric resonator is implemented as a high impedance inverter to improve the phase noise, and the quality factor of resonant circuit can be transferred to active device with the enhanced loaded quality factor. The developed VCO has the oscillating tuning range of 9.7965~9.8032 GHz for the control voltage range of 0~12 V. This VCO requires the DC power of 8 V and 17 mA. The phase noise characteristics are -96.51 dBc/Hz @10 KHz and -116.5 dBc/Hz @100 KHz, respectively. And, the output power of 7.33 dBm is measured.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.787-792
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• 2004

This paper shows the design, fabrication and performance of oscillator appled to 5.5GHz RF module for local wireless communication system. Super low noise HJ FET of NE3210S01 is used to obtain a good phase noise Performance. The design Parameters for the optimum operating performance are simulated with ADS simulation. The measured out Power is 10 dBm at 5.5GHz, the second harmonic suppression -31 dBc, and the phase noise characteristics -98.83 dBc at 100kHz offset frequency, respectively. This implemented oscillator is available to local wireless Communication system.

• Convergence Security Journal
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• v.6 no.3
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• pp.49-58
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• 2006

Currently there are many standards of network management. They are : SNMP (Simple Network Management Protocol-for Internet management), CMIP (Common Management Information Protocol-standardized by ITU-T and ISO), RMON (Remote network MONitoring-for distributed management of the LAN segment), and so on. Especially RMON has created the many concerns in order to manage subnetworks of a large network, but it has negative aspects. For instance, routers or hubs with RMON capability are expensive to a network manager because of adding heavy management cost. Moreover it imposes a heavier burden on network manager, because it must use a network management tool which will be additionally needed with RMON device. This paper proposes a model of PC based RMON Agent system. The RMON Agent system monitors the traffic on LAN segment through the use of a Virtual Device Driver (VxD), based on PC. In term of cost this model will replace the expensive RMON device, and eventually enable a network manager to manage LAN segment more efficiently, due to reduced cost.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.37-40
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• 2003

The 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed for applications to the miniature repeater. The miniature dual-band repeater will be used at shopping mall, basements and underground parking lots. The in-loop 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed by designing Si BJT VCO and PLL loop circuits with Colpitts. The prototype of 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer of size 19${\times}$19${\times}$8(mm) has shown operating frequencies of 1.63㎓, 2.33㎓ ranges, RF output of 1dBm(PCS), 1dBm(IMT-2000), phase noise of -100 dBc/Hz(PCS), -95dBc/Hz(IMT-2000) at 10KHz offset, harmonics suppression of -24dB c(PCS), -15dBc(IMT-2000).

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.236-244
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• 2003

In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.