• Title/Summary/Keyword: cycle count

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A Adaptive Garbage Collection Policy for Flash-Memory Storage System in Embedded Systems (실시간 시스템에서의 플래시 메모리 저장 장치를 위한 적응적 가비지 컬렉션 정책)

  • Park, Song-Hwa;Lee, Jung-Hoon;Lee, Won-Oh;Kim, Hee-Earn
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.3
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    • pp.121-130
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    • 2017
  • NAND flash memory has advantages of non-volatility, little power consumption and fast access time. However, it suffers from inability that does not provide to update-in-place and the erase cycle is limited. Moreover, the unit of read/write operation is a page and the unit of erase operation is a block. Therefore, erase operation is slower than other operations. The AGC, the proposed garbage collection policy focuses on not only garbage collection time reduction for real-time guarantee but also wear-leveling for a flash memory lifetime. In order to achieve above goals, we define three garbage collection operating modes: Fast Mode, Smart Mode, and Wear-leveling Mode. The proposed policy decides the garbage collection mode depending on system CPU usage rate. Fast Mode selects the dirtiest block as victim block to minimize the erase operation time. However, Smart Mode selects the victim block by reflecting the invalid page number and block erase count to minimizing the erase operation time and deviation of block erase count. Wear-leveling Mode operates similar to Smart Mode and it makes groups and relocates the pages which has the similar update time. We implemented the proposed policy and measured the performance compare with the existing policies. Simulation results show that the proposed policy performs better than Cost-benefit policy with the 55% reduction in the operation time. Also, it performs better than Greedy policy with the 87% reduction in the deviation of erase count. Most of all, the proposed policy works adaptively according to the CPU usage rate, and guarantees the real-time performance of the system.

Association of GRIA1 polymorphisms with ovarian response to human menopausal gonadotropin in Iranian women

  • Golestanpour, Hossein;Javadi, Gholamreza;Sheikhha, Mohammad Hasan
    • Clinical and Experimental Reproductive Medicine
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    • v.47 no.3
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    • pp.207-212
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    • 2020
  • Objective: Glutamate ionotropic receptor AMPA type subunit 1 (GRIA1) is a subunit of a ligand-gated ion channel that regulates the secretion of follicle-stimulating hormone (FSH) and luteinizing hormone (LH) by controlling the release of gonadotropin-releasing hormone. Few studies have investigated the association between the GRIA1 gene and human infertility. This study evaluated the association of the GRIA1 rs548294 C > T and rs2195450 G > A polymorphisms with the ovarian response to human menopausal gonadotropin (HMG) in Iranian women. Methods: One hundred women with histories of at least 1 year of infertility were included. On the second day of menstruation, patients were injected with HMG; on the third day, blood samples were collected. After hormonal analysis, the GRIA1 rs548294 C > T and rs2195450 G > A genotypes of samples were identified via the restriction fragment length polymorphism method, and on day 9, the number of follicles was assessed via ultrasound. Results: For the GRIA1 rs548294 C > T and rs2195450 G > A single nucleotide polymorphisms, the subjects with CT and GG genotypes, respectively, displayed the highest mean FSH level, LH level, and number of follicles on day 9 of the menstrual cycle (p< 0.05). Significant positive correlations were observed between LH and FSH (p< 0.01), LH and follicle count (p< 0.01), FSH and age (p< 0.05), follicle count and age (p= 0.048), and FSH and follicle count (p< 0.01). Conclusion: This study showed a significant relationship between GRIA1 polymorphisms and ovarian response to the induction of ovulation. Therefore, determining patients' GRIA1 genotype may be useful for improving treatment and prescribing suitable doses of ovulation-stimulating drugs.

Application of Gamma Irradiation on Manufacturing Changran Jeotgal (aged and seasoned intestine of Alaska pollack) : Microbiological and Sensory Characteristics (양념 창란젓갈 제조시 감마선 조사기술 적용: 미생물학적 및 관능적 품질특성)

  • Jo, Cheorun;Kim, Dong-Ho;Lee, Won-Dong;Lee, Jae-Jin;Byun, Myung-Woo
    • Journal of the Korean Society of Food Science and Nutrition
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    • v.32 no.5
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    • pp.673-678
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    • 2003
  • Changran Jeotgal (aged and seasoned intestine of Alaska pollack) was prepared as the same method as commercial one and irradiated at 0, 2.5, 5.0 and 10 k㏉ by gamma ray for industrial application. Changran Jeotgal using 10 k㏉-irradiated red pepper powder was also prepared to compare with control (0 k㏉). Commercial red pepper powder was already contaminated at 3.8$\times$10$^{6}$ CFU/$m\ell$ level by total plate count and 10k㏉ of irradiation reduced the number about 4 log cycles. Gamma irradiated Changran Jeotgal at 2.5,5.0, and 10k㏉ showed 3 6, and 7 log cycles of reduction compared to the non-irradiated control in the total plate count after 12 weeks of storage at 1$0^{\circ}C$. Using irradiated (10k㏉) red pepper powder reduced the microbial contamination significantly by 2 log cycles compared to the control. Sensory evaluation showed that the sample irradiated at 2.5 k㏉ was the most acceptable, followed by the sample using irradiated red pepper powder and non-irradiated control. Thus, 2.5 k㏉ of irradiation of Changran Jeotgal was effective to improve safety during distribution and storage without change of sensory quality. Furthermore, using the irradiated red pepper powder is also recommended for safety enhancement of the products.

Buck-Boost Interleaved Inverter Configuration for Multiple-Load Induction Cooking Application

  • Sharath Kumar, P.;Vishwanathan, N.;Bhagwan, K. Murthy
    • Journal of Electrical Engineering and Technology
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    • v.10 no.1
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    • pp.271-279
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    • 2015
  • Induction cooking application with multiple loads need high power inverters and appropriate control techniques. This paper proposes an inverter configuration with buck-boost converter for multiple load induction cooking application with independent control of each load. It uses one half-bridge for each load. For a given dc supply of $V_{DC}$, one more $V_{DC}$ is derived using buck-boost converter giving $2V_{DC}$ as the input to each half-bridge inverter. Series resonant loads are connected between the centre point of $2V_{DC}$ and each half-bridge. The output voltage across each load is like that of a full-bridge inverter. In the proposed configuration, half of the output power is supplied to each load directly from the source and remaining half of the output power is supplied to each load through buck-boost converter. With buck-boost converter, each half-bridge inverter output power is increased to a full-bridge inverter output power level. Each half-bridge is operated with constant and same switching frequency with asymmetrical duty cycle (ADC) control technique. By ADC, output power of each load is independently controlled. This configuration also offers reduced component count. The proposed inverter configuration is simulated and experimentally verified with two loads. Simulation and experimental results are in good agreement. This configuration can be extended to multiple loads.

A Study of the High Reliability in Plastic BGA Solder Joints (플라스틱 BGA 솔더접합부의 고신뢰성에 관한 연구)

  • Kim, Kyung-Seob;Shin, Young-Eui;Lee, Hyuk
    • Journal of Welding and Joining
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    • v.17 no.3
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    • pp.90-95
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    • 1999
  • The increase in high speed, multi-function and high I/O pin semiconductor devices highly demands high pin count, very thin, and high density packages. BGA is one of the solutions, but the package has demerits in package reliability, surface mounting problems due to the PCB warpage and solder joint crack related with TCE mismatch between the materials. On this study to verify the thermal fatigue lifetime of the solder joint FEM and experiments were performed after surface mounting BGA with different solder composition and reliability conditions. FEM showed optimum composition of Ag3.2-Sn96.5 and under the composition minimum creep deformation of the solder joint was calculated, and the thermal fatigue lifetime was improved. In view of temperature cycle condition, the conditions of $-65^{\circ}C$to $150^{\circ}C$ showed minimum lifetime and t was 1/3 of $0^{\circ}C$ to $125^{\circ}C$ condition. Test board was prepared and solder joint crack was verified. Until 1000cycle on soder joint crack was observed.

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An Optimized Hardware Design for High Performance Residual Data Decoder (고성능 잔여 데이터 복호기를 위한 최적화된 하드웨어 설계)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.11
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    • pp.5389-5396
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    • 2012
  • In this paper, an optimized residual data decoder architecture is proposed to improve the performance in H.264/AVC. The proposed architecture is an integrated architecture that combined parallel inverse transform architecture and parallel inverse quantization architecture with common operation units applied new inverse quantization equations. The equations without division operation can reduce execution time and quantity of operation for inverse quantization process. The common operation unit uses multiplier and left shifter for the equations. The inverse quantization architecture with four common operation units can reduce execution cycle of inverse quantization to one cycle. The inverse transform architecture consists of eight inverse transform operation units. Therefore, the architecture can reduce the execution cycle of inverse transform to one cycle. Because inverse quantization operation and inverse transform operation are concurrency, the execution cycle of inverse transform and inverse quantization operation for one $4{\times}4$ block is one cycle. The proposed architecture is synthesized using Magnachip 0.18um CMOS technology. The gate count and the critical path delay of the architecture are 21.9k and 5.5ns, respectively. The throughput of the architecture can achieve 2.89Gpixels/sec at the maximum clock frequency of 181MHz. As the result of measuring the performance of the proposed architecture using the extracted data from JM 9.4, the execution cycle of the proposed architecture is about 88.5% less than that of the existing designs.

Microbial changes and physico-chemical properties of beef and pork loin with microwave treatment (마이크로파 처리한 소고기 및 돼지고기의 미생물 변화 및 이화학적 특성)

  • Lee, Kyong-Ae;Byoun, Kwang-Eui
    • Korean Journal of Human Ecology
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    • v.14 no.1
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    • pp.217-221
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    • 2005
  • In this study, the effect of microwave treatment on physico-chemical properties and microbial changes of beef and pork loin was investigated. Beef and pork were heated in microwave with an adjusted electric output at 500 W and operating frequency 2,450 MHz. The beef and pork samples were treated with microwave for 10 s or 20 s at 50% duty cycle. Drip losses and TBA values of beef and pork samples increased due to the microwave treatment. The samples became darker and more yellowish through microwaves, whereas their redness was unchanged. Microbial content of beef and pork samples declined as the treatment time increased. When pork samples were heated in a microwave oven, organisms were reduced by 2 log cycles in 20 s. It was concluded that a 20 second-long microwave treatment can great1y enhance the microbial safety of the pork sample.

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Bracken-fern Extracts Induce Cell Cycle Arrest and Apoptosis in Certain Cancer Cell Lines

  • Roudsari, Motahhareh Tourchi;Bahrami, Ahmad Reza;Dehghani, Hesam;Iranshahi, Mehrdad;Matin, Maryam Moghadam;Mahmoudi, Mahmud
    • Asian Pacific Journal of Cancer Prevention
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    • v.13 no.12
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    • pp.6047-6053
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    • 2012
  • Bracken fern [Pteridium aquilinem (L.) kuhn (Dennstaedtiaceae)] is one of the most common species on the planet. It has been consumed by humans and animals for centuries. Use by some human groups is because they believe bracken fern is good for health as plant medicine. However, it is also one of the few known plants that can cause tumors in farm animals. Many interested groups have focused their attention on bracken fern because of these interesting features. In order to evaluate the biological effects of exposure to this plant in cellular level, human cancer cell lines were treated with the fern dichloromethane extracts and the genotoxic and cytotoxic effects were studied. Anti-proliferative/cytotoxic effects were evaluated by cell count, MTT assay and flow cytometry methods with three different cancer cell lines, TCC, NTERA2, and MCF-7, and two normal cells, HDF1 and HFF3. Pro-apoptotic effects of the extracts were determined by DAPI staining and comet assay, on TCC cancer cells compared to the normal control cell lines. Cellular morphology was examined by light microscopy. Our present study showed that the extract caused DNA damage and apoptosis at high concentrations ($200{\mu}g/mL$) and also it may induce cell cycle arrest (G2/M phase) at mild concentrations (50 and $30{\mu}g/mL$) depending on the cell type and tumor origin. These results indicate that bracken fern extract is a potent source of anticancer compounds that could be utilized pharmaceutically.

Design of HEVC CABAC Encoder With Parallel Processing of Bypass Bins (우회 빈의 병렬처리가 가능한 HEVC CABAC 부호화기의 설계)

  • Kim, Doohwan;Moon, Jeonhak;Lee, Seongsoo
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.583-589
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    • 2015
  • In the HEVC CABAC, the probability model is updated after a bin is encoded and next bin is encoded based on the updated probability model. Conventional CABAC encoders can encode only one bin per cycle, which cannot increase the encoding throughput. The probability model does not need to be updated in the bypass bins. In this paper, a HEVC CABAC encoder is proposed to increase encoding throughput by parallel processing of bypass bins. The designed CABAC encoder can process either a regular bin or maximum 4 bypass bins in a cycle. On the average, it can process 1.15~1.92 bins in a cycle. Synthesized in 0.18 um technology, its gate count, maximum operating speed, and the maximum throughput are 78,698 gates, 136 MHz, and 261 Mbin/s, respectively.

Design of High Performance Multi-mode 2D Transform Block for HEVC (HEVC를 위한 고성능 다중 모드 2D 변환 블록의 설계)

  • Kim, Ki-Hyun;Ryoo, Kwang-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.2
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    • pp.329-334
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    • 2014
  • This paper proposes the hardware architecture of high performance multi-mode 2D forward transform for HEVC which has same number of cycles for processing any type of four TUs and yield high throughput. In order to make the original image which has high pixel and high resolution into highly compressed image effectively, the transform technique of HEVC supports 4 kinds of pixel units, TUs and it finds the optimal mode after performs each transform computation. As the proposed transform engine uses the common computation operator which is produced by analyzing the relationship among transform matrix coefficients, it can process every 4 kinds of TU mode matrix operation with 35cycles equally. The proposed transform block was designed by Verilog HDL and synthesized by using TSMC 0.18um CMOS processing technology. From the results of logic synthesis, the maximum operating frequency was 400MHz and total gate count was 214k gates which has the throughput of 10-Gpels/cycle with the $4k(3840{\times}2160)@30fps$ image.