• Title/Summary/Keyword: code synchronization

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Design of Integrated Database Program for Optimal Operation of Distribution Automation System (배전지능화시스템 최적 운영을 위한 통합 데이터베이스 프로그램 설계)

  • Choi, Yun-Hyuk;Jang, Moon-Jong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.8
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    • pp.987-993
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    • 2018
  • In the existing distribution automation system, the database is managed by each distribution office. But there is a high possibility to happened a problem during a fault processing because the representation of the connection switches between distribution offices are complicated. In addition, if a distribution office will be going to collapse due to disaster, for example, a big fire or earthquake, its own database may be lost. In order to solve this problem, it is necessary to have a structure of an integrated database management from an integration center to under the distribution office. To do this, the integration center must store and manage it as the database using the own office code.

Development of core model connection technology for Nuclear Power Plant Simulator (원전 시뮬레이션 노심-계통 연계기술 개발)

  • Lee Ji-woo;Lee Yong-kwan;Lee Myeong-soo;Hong Jin-hyuk;Lee Seung-Ho;Suh Jeong-Kwan
    • Proceedings of the Korea Society for Simulation Conference
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    • 2005.05a
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    • pp.129-133
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    • 2005
  • This paper describes the methodology of connecting MASTER (Multi-purpose Analyzer for Static and Transient Effects of Reactors) to simulator system, system configuration, and previous test. The actual simulator environment for Youngkwang Unit1 has been developed. It is impossible for the simulator server to execute MASTER code by limitation of computer performance. So, environment of distributed system was developed, and it had a synchronization task. As MASTER and simulator module should be synchronized in different device, the connection of communication was tested and verified.

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A Study on the Implementation of Frequency Hopping Binary Noncohrent FSK Tranceiver (주파수 도약2진 비코히어런트 FSK송수신기 실현에 관한 연구)

  • 박영철;김재형;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.3
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    • pp.260-268
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    • 1990
  • This paper investigates the design of a frequency hopping FSK tranceiver system, where the system enhancements are made in the following three aspects: dual frequency synthesiszation for the increased hopping rate, linearization of VCO gain in PLL to improve BFSK modulation characteristics, and fast code synchronization by the matched filter method.

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Consideration of Roman Character in KS × 1001 Code System for Information Interchange considered AMI/HDB-3 and HDLC FLAG (AMI/HDB-3 회선부호화 및 HDLC FLAG를 고려한 KS × 1001 정보 교환용 로마문자 부호체계고찰)

  • Hong, Wan-Pyo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.7
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    • pp.1017-1023
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    • 2013
  • Datacommunications transmit the source codes that are coded in information devices, such as computer to the transmission line by means of the line coded signal. AMI method is applied to the line coding method to transmit the signal for long distance. The disadvantage of the AMI method is to loss the bit synchronization when consecutive binary bit '0' over 4ea is coming into line coder. The scrambling technique is used to overcome the problem. The HDB-3 scrambling method is used in Korea standard which standard in ITU-T. When the HDB-3 technology is used. the method should convert the consecutive bit '0' over 4ea to certain bits format. As a result, when there are many such kind of '0' bit stream in source codes, data transmission efficiency will be decreased to treat in line coder, etc. This paper is directed to study the Roman character code system in $KS{\times}1001$, Korea standard for information exchange code in datacommunication systems. Based on the study result, this paper proposed the maximum optimized Roman character code system. In the study, Character coding rule for $4{\times}4$bits and the statistical data for roman character using frequency were considered to simulate. The paper shows the result that when the proposed new roman character coding system is applied to use, the data transmission efficiency could be increased to about 134% compared to existing code system.

FPGA Design and Sync-Word Detection of CATV Down-Link Stream Transmission System (CATV 하향 스트림 적용 시스템에서 동기 검출 방안 및 FPGA 설계)

  • Jung, Ji-Won
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.4 no.4
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    • pp.286-294
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    • 2011
  • Cable modems typically are implemented by a forward error correction(FEC) scheme. The ITU-T Recommendation J-38 Annex B specifies using 64- and 256- quadrature amplitude modulation (QAM) and extended RS coding scheme. In implementing the cable modem, there are some problems to fabricate and fitting on FPGA chip. First, many clocks are needed in implementing cable modem because of different code rate and different modulation types. To reduce the number of clocks, we use the two memories, which are different clock speed for reading and writing data. Second, this system lost the bit-synchronization and frame-synchronization in decoder, the system recognize that all data is error. This paper solves the problems by using simple 5-stage registers and unique sync-word. Based on solutions for about problems, the cable modem is fabricated on FPGA chip name as Vertex II pro xc2vp30-5 by Xilinx, and we confirmed the effectiveness of the results.

A Low-Complexity Alamouti Space-Time Transmission Scheme for Asynchronous Cooperative Systems (비동기 협력 통신 시스템을 위한 저복잡도 Alamouti 시공간 전송 기법)

  • Lee, Young-Po;Chong, Da-Hae;Lee, Young-Yoon;Song, Chong-Han;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5C
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    • pp.479-486
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    • 2010
  • In this paper, we propose a novel low-complexity Alamouti coded orthogonal frequency division multiplexing (OFDM) scheme for asynchronous cooperative communications. Exploiting the combination of OFDM symbols at the source node and simple operations including sign change and complex product at the relay node, the proposed scheme can achieve cooperative diversity gain without use of time-reversion and shifting operations that the conventional scheme proposed by Li and Xia needs. In addition, by using the cyclic prefix (CP) removal and insertion operations at the relay node, the proposed scheme does not suffer from a considerable degradation of bit-error-rate (BER) performance even though perfect timing synchronization is not achieved at the relay node. From the simulation results, it is demonstrated that the BER performance of the proposed scheme is much superior to that of the conventional scheme in the presence of timing synchronization error at the relay node. It is also shown that the proposed scheme obtains two times higher diversity gain compared with the conventional scheme at the cost of half reduction in transmission efficiency.

A GNSS Code Tracking Scheme Based in Slope Difference of Correlation Outputs (상관 함수의 기울기 차에 기반한 GNSS의 부호 추적 기법)

  • Yoo, Seung-Soo;Yoo, Seung-Hwan;Chong, Da-Hae;Ahn, Sang-Ho;Yoon, Seok-Ho;Kim, Sun-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.6C
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    • pp.505-511
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    • 2008
  • The global navigation satellite system (GNSS) is using a direct sequence/spread spectrum (DS/SS) modulation. In order to recover the information data, the DS/SS system first performs a two-step synchronization process: acquisition and tracking. The acquisition process adjusts the phase difference between the received and locally generated acquisition sequences within ${\pm}T_c/2$ or less, where $T_c$ is the chip period. The tracking process performs fine synchronization. In this paper, we focus on the tracking issue. The single delta delay locked loop($\Delta$-DLL) is the optimal tracking scheme for a GNSS in the absence of multipath signals, where $\Delta$ means the spacing between the early and late correlation time offset. In the multipath environments, however, the $\Delta$-DLL suffers from huge estimation bias(denoted by $\beta$) caused by distorted correlation values. Although some modified schemes such as a $\Delta$-DLL with a narrow $\Delta$ and a double delta DLL (${\Delta}^{(2)}$-DLL) were proposed to reduce the estimation bias, they cannot remove the estimation bias completely and need more accurate acquisition process. This paper proposes a novel tracking scheme that can dramatically reduce the estimation bias, using the maximum slope change among the correlation outputs.

A development of DS/CDMA MODEM architecture and its implementation (DS/CDMA 모뎀 구조와 ASIC Chip Set 개발)

  • 김제우;박종현;김석중;심복태;이홍직
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.6
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    • pp.1210-1230
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    • 1997
  • In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.

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A Robust Biometric-based User Authentication Protocol in Wireless Sensor Network Environment (무선센서네트워크 환경에서 생체기반의 개선된 사용자 인증 프로토콜)

  • Shin, Kwang-Cheul
    • The Journal of Society for e-Business Studies
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    • v.18 no.3
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    • pp.107-123
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    • 2013
  • In a wireless sensor network environment, it is required to ensure anonymity by keeping sensor nodes' identifiers not being revealed and to support real-time authentication, lightweight authentication and synchronization. In particular, there exist possibilities of location information leakage by others, privacy interference and security vulnerability when it comes to wireless telecommunications. Anonymity has been an importance issue in wired and wireless network environment, so that it has been studied in wide range. The sensor nodes are interconnected among them based on wireless network. In terms of the sensor node, the researchers have been emphasizing on its calculating performance limit, storage device limit, and smaller power source. To improve of biometric-based D. He scheme, this study proposes a real-time authentication protocol using Unique Random Sequence Code(URSC) and variable identifier for enhancing network performance and retaining anonymity provision.

Study on Common Phase Offset Tracking Scheme for Single Carrier System with Frequency Domain Equalization (단일 반송파 주파수 영역 등화 시스템을 위한 공통 위상 추적 기법 연구)

  • Kim, Young-Je;Park, Jong-Hun;Cho, Jung-Il;Cho, Hyung-Weon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.11C
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    • pp.641-648
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    • 2011
  • Frequency domain equalization is the most promising technology that has relatively low complexity in multipath channel. A frame of single carrier system with frequency domain equalization (SC-FDE) has cyclic prefix to mitigate effect of delay spread. After synchronization and equalization procedure on the SC-FDE system, common phase offset (CPO) that can introduce performance degradation caused by phase mismatch between transmitter and receiver oscillators is remained. In this paper, common phase offset tracking in frequency domain is proposed. To track CPO, constant amplitude zero autocorrelation code sequence as training sequence is adopted. By using numerical results, performance of mean square error is evaluated. The results show that MSE of CPO has similar performance compare to the time-domain estimation and there is no need of domain conversion.