• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.131-133
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• 1999

This paper proposed the technique of the fault-types classification using Adaptive Network Fuzzy Inference System in the distribution system. Fault and fault-like data in the linear RL load, arc furnace load and converter load were extracted by EMTP. These were characterized into 5 input variables and fuzzified automatically by learning. This technique was tested using another fault data unused learning.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.11
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• pp.7957-7963
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• 2015

R&D trend for Auxiliary Power Supply(APU) of electric vehicle can be well understood by analyzing patents at home and abroad. Based on this trend analysis, domestic technology development direction is proposed. To get technique trend, patents of Korea, Japan, Europe and America published until February of 2014 are analyzed by WIPS DB. First, power converter and transformer two big category are classified. Power converter can be classified into resonant DC to DC converter and resonant Half bridge inverter; transformer can be classified into high frequency transformer, ferrite transformer and matching transformer. By analyzing R&D trend of different counties, companies and years, specific technology needed to be developed and trend of technology can be accurately grasped.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1190-1199
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• 2016

This study proposes a classification and compensation algorithm of two non-ideal output signals of a resolver to reduce position errors. Practically, a resolver generates position errors because of amplitude imbalance and quadrature imperfection between the two output signals of the resolver. In this study, a digital signal processor system based on a resolver-to-digital converter is used to reconstruct the two output signals of the resolver. The two output signals, "sin" and "cos," can be represented by a unit circle on the xy-plot. The classification and compensation of the errors can be obtained by using the radius and area of the circle made by the resolver signals. The method computes the integration of the areas made by the two resolver output signals to classify and compensate the error. This system cannot be applied during transient response given that the area integration during the transient state causes an error in the proposed method. The proposed method does not need any additional hardware. The experimental results verify the effectiveness of the proposed algorithm.

• Journal of Power Electronics
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• v.15 no.1
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• pp.256-267
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• 2015

Grid-connected transformerless photovoltaic (PV) inverters (TPVIs) are increasingly dominating the market due to their higher efficiency, lower cost, lighter weight, and reduced size when compared to their transformer based counterparts. However, due to the lack of galvanic isolation in the low voltage grid interconnections of these inverters, the PV systems become vulnerable to leakage currents flowing through the grounded star point of the distribution transformer, the earth, and the distributed parasitic capacitance of the PV modules. These leakage currents are prohibitive, since they constitute an issue for safety, reliability, protection coordination, electromagnetic compatibility, and module lifetime. This paper investigates a wide range of multi-kW range power rating TPVI topologies and classifies them in terms of their leakage current attributes. This systematic classification places most topologies under a small number of classes with basic leakage current attributes. Thus, understanding and evaluating these topologies becomes an easy task. In addition, based on these observations, new topologies with reduced leakage current characteristics are proposed in this paper. Furthermore, the important efficiency and cost determining characteristics of converters are studied to allow design engineers to include cost and efficiency as deciding factors in selecting a converter topology for PV applications.

• KIPS Transactions on Software and Data Engineering
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• v.11 no.7
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• pp.299-306
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• 2022

In recent, sensors embedded in robots, equipment, and circuits have become common, and research for diagnosing device failures by learning measured sensor data is being actively conducted. This failure diagnosis study is divided into a classification model for predicting failure situations or types and a regression model for numerically predicting failure conditions. In the case of a classification model, it simply checks the presence or absence of a failure or defect (Class), whereas a regression model has a higher learning difficulty because it has to predict one value among countless numbers. So, the reason that regression modeling is more difficult is that there are many irregular situations in which it is difficult to determine one output from a similar input when predicting by matching input and output. Therefore, in this paper, we focus on input and output data with periodicity, analyze the input/output relationship, and secure regularity between input and output data by performing sliding window-based input data patterning. In order to apply the proposed method, in this study, current and temperature data with periodicity were collected from MMC(Modular Multilevel Converter) circuit system and learning was carried out using ANN. As a result of the experiment, it was confirmed that when a window of 2% or more of one cycle was applied, performance of 97% or more of fit could be secured.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.731-733
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• 1988

This paper describes a design of hardware system for real time automatic diagnosis of ECG arrhythmia based on pipeline processor consisting of the three microcomputer. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggered detector. Four diagnostic parameters - heart rate, morphology, axis, and ST segment - are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. There-fore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory units is designed to decrease the delay time caused by data transfer between processors and by which the delay time can be taken 1 % of one clock period.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.8
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• pp.1217-1226
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• 1989

This paper describes a design of hardware system for real time automatic diagnosis of ECG arrhythmia based on pipeline processor consisting of three microcomputer. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggered detector. Four diagnostic parameters-heart rate, morpholigy, axis, and ST segment-are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. Therefore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory unit is designed to decrease the delay time caused by data transfer between processors and be which the delay time can be taken 1% of one clock period.

• Journal of Biomedical Engineering Research
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• v.9 no.1
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• pp.79-86
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• 1988

This paper describes the design of a hardware systenl for ECG feature extraction based on pipeline processor consistinsf of three microcomputers. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggered detector. Four diagnostic parameters parameters-heart rate, morPhology, axis, and 57 segment-are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. Therefore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory units is designed to decrease the delay time caused by data transfer between processors and designed by which the delay time can be taken Loye of one clock period.

• 제어로봇시스템학회:학술대회논문집
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• 1988.10a
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• pp.697-700
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• 1988

This paper describes the design of a hardware system for ECG feature extraction based on pipeline processor consisting of three computers. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggred detector. Four diagnostic parameters-heart, axis, and ST axis, and ST segment are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. Therefore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory units is designed to decrease the delay time caused by data transfer between processors and designed by which the delay time can be taken 1% of one clock period.

• Proceedings of the KIEE Conference
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• 1999.07a
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• pp.27-30
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• 1999

In this paper HEV's are newly classified and a new breed of HEV's, which is called series-parallel compensated configuration is also presented. In this configuration the engine can be operated on constant-speed and constant-torque mode, while the power converter can be small-sized.