• Journal of Power Electronics
• /
• 제15권5호
• /
• pp.1207-1216
• /
• 2015

In order to suppress the low frequency oscillation of the neutral-point voltage for three-level inverters, this paper proposes a new discontinuous pulse width modulation (DPWM) control method. The conventional sinusoidal pulse width modulation (SPWM) control has no effect on balancing the neutral-point voltage. Based on the basic control principle of DPWM, the relationship between the reference space voltage vector and the neutral-point current is analyzed. The proposed method suppresses the low frequency oscillation of the neutral-point voltage by keeping the switches of a certain phase no switching in one carrier cycle. So the operating time of the positive and negative small vectors is equal. Comparing with the conventional SPWM control method, the proposed DPWM control method suppresses the low frequency oscillation of the neutral-point voltage, decreases the output waveform harmonics, and increases both the output waveform quality and the system efficiency. An experiment has been realized by a neutral-point clamped (NPC) three-level inverter prototype based on STM32F407-CPLD. The experimental results verify the correctness of the theoretical analysis and the effectiveness of the proposed DPWM method.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1991년도 하계학술대회 논문집
• /
• pp.611-614
• /
• 1991

In variable speed driving system of three phase induction motor controlled by an inverter, because of the switching of semiconductor devices in inverter, an appreciable amount of harmonic components of voltage waveform can cause the motor to generate losses, torque ripple, acoustic noise and oscillation of semiconductor devices. In this paper a new PAM type PWM inverter using IGBT is described. The output waveforms in the proposed PAM type PWM inverter are investigated both theoretiically and experimentally. The line-voltage waveform is composed of fundamental component and the sidebands of carrier frequency. The lower order harmonics are not included in the output wave form. As each inverter arm does not operate during two-thirds period, the heats, generated in the devices are reduced. That is, the size of the inverter system can he minimized because of the reduction in the heat dissipating equipment.

• Journal of Power Electronics
• /
• 제16권2호
• /
• pp.480-489
• /
• 2016

A novel hybrid carrier-based pulse width modulation (CBPWM) scheme that combines unipolar and dipolar modulations is proposed for single-phase three-level rectifiers, which are widely applied in railway traction drive systems. The proposed CBPWM method can satisfy the volt-second balancing principle in the complete modulation index region through overmodulation compensation. The modulation scheme features two modulation modes: unipolar and dipolar. The operation range limits of these modulation modes can be modified by changing the separation coefficient. In comparison with the traditional unipolar CBPWM, the proposed hybrid CBPWM scheme can provide advantageous features, such as lower high-order harmonic distortion of the line current and better utilization of switching frequency. The separation coefficient value is optimized to achieve the maximum utilization of these advantages. The experimental results verify the feasibility and effectiveness of the proposed hybrid CBPWM scheme.

• 한국전자파학회논문지
• /
• 제14권4호
• /
• pp.356-362
• /
• 2003

본 논문에서는 2차 고조파 성분과 차주파수 성분의 새로운 조합을 통해 전력 증폭기에서 발생되는 3차와 5차 혼변조 성분을 개별적으로 조절할 수 있는 전치왜곡 선형화기를 설계 및 제작하였다. 2차 고조파 성분과 차주파수 성분은 포락선 검파기와 두 개의 주파수 체배기를 사용하여 발생시켰다. 제안된 전치왜곡 선형화기는 3차와 5차의 혼변조 성분을 개별적으로 조절하여 전력 증폭기의 선형화 특성을 극대화하였다. 측정 결과, 2137.5~2142.5 MHz 대역의 W-CDMA 1-FA의 30 dBm 출력에서 11 dB ACPR 개선 효과를 얻었다.

• Journal of information and communication convergence engineering
• /
• 제13권2호
• /
• pp.139-143
• /
• 2015

A push-push voltage controlled dielectric resonator oscillator (VCDRO) with a modified frequency tuning structure using broadside couplers is investigated. The push-push VCDRO designed at 16 GHz is manufactured using a low temperature co-fired ceramic (LTCC) technology to reduce the circuit size. The frequency tuning structure using a broadside coupler is embedded in a layer of the A6 substrate by using the LTCC process. Experimental results show that the fundamental and third harmonics are suppressed above 15 dBc and 30 dBc, respectively, and the phase noise of push-push VCDRO is -97.5 dBc/Hz at an offset frequency of 100 kHz from the carrier. The proposed frequency tuning structure has a tuning range of 4.46 MHz over a control voltage of 1-11 V. This push-push VCDRO has a miniature size of 15 mm×15 mm. The proposed design and fabrication techniques for a push-push oscillator seem to be applicable in many space and commercial VCDRO products.

• 전력전자학회논문지
• /
• 제19권4호
• /
• pp.376-382
• /
• 2014

This paper proposes the pulse width modulation (PWM) control strategy for low-speed operation in the three-level neutral-point-clamped (NPC) inverters based on the bootstrap gate drive circuit. As a purpose of the cost reduction, several papers have paid attention to the bootstrap circuit applied to the three-level NPC inverter. However, the bootstrap gate driver IC cannot generate the gate signal to the IGBT for low-speed operation, because the bootstrap capacitor voltage decreases under the threshold level. For low-speed operation, the dipolar and partial-dipolar modulations can be the effective solution. However, these modulations have drawbacks in terms of the switching loss and THD. Therefore, this paper proposes the PWM control strategy to operate the inverter at low-speed and to minimize the switching loss and harmonics. The experimental results are presented to verify the validity on the proposed method.

• 한국정보통신학회논문지
• /
• 제14권3호
• /
• pp.541-546
• /
• 2010

LTCC(low temperature co-fired ceramic) 공정의 다층기판을 이용하여 push-push 유전체 공진 발전기를 설계 및 제작하였다. 중심주파수 8GHz를 갖는 직렬 궤환형의 단일 유전체 공진 발진기를 설계하고 이를 이용하여 중심주파수 16GHz인 push-push 유전체 공진 발진기를 설계하였다. 발전기의 회로 크기에 큰 영향을 미치는 바이어스 회로를 LTCC 다층구조의 중간층에 배치함으로써 일반적인 단층기판을 이용한 경우에 비해 발진기 회로의 크기를 크게 줄 일 수 있었다. 제작된 push-push 유전체 공진 발진기의 측정결과 기본 주파수 및 3차 고조파 억압특성은 각각 15dBc 및 25dBc 이상의 특성을 나타내었으며 발진기의 위상잡음 특성은 -102dBc/Hz@100KHz 및 -128dBc/Hz@1MHz의 특성을 각각 나타내었다.

• 전자공학회논문지T
• /
• 제35T권2호
• /
• pp.86-92
• /
• 1998

본 논문에서는 DS/CDMA방식을 사용하는 PCS이동국의 표준규격인 J-STD-018에 의한 수신기의 고주파(RF)부 시스템 파라미터를 제시하였고, 수신기의 소자특성에 따른 시스템 성능을 분석하였다. 모의실험 결과 J-STD-018을 만족하는 이동국의 잡음 지수가 10dB인 경우 수신 캐리어로부터 1.25MHz 떨어진 지점에서 선택도는 -70.96dB이며 제 3고조파 차단점은 I 등급 이동국이 -9.5dBm, II~V등급 이동국이 -14dBm이상이었다. 또한 수신기에 입력되는 간섭신호전력이 작을 경우 LNA의 이득이 클수록 성능이 우수하지만, 간섭신호전력이 클 경우 스퓨리어스 영향이 증가하여 성능을 저하시켰다. 따라서 스퓨리어스의 영향을 줄이기 위한 방법으로 LNA의 스위치를 On/Off함으로써 효용성을 입증하였다.

• 한국정보통신학회논문지
• /
• 제16권10호
• /
• pp.2230-2236
• /
• 2012

현재 대형선박에서 다이오드 정류기를 이용한 AC-DC 전력변환장치를 주로 사용하고 있으며 이는 총고조파왜형율을 줄이기 위하여 다중펄스를 출력할 수 있는 상치환변압기가 추가적으로 설치되어야 한다. 이 경우 상치환변압기의 설치로 인해 공간적, 경제적 손실이 발생한다. 본 논문에서는 LNG 운반선 등과 같은 대형선박에서 현재 운용중인 다이오드 정류기를 대신하여 SCR, IGBT등의 소자를 이용하는 새로운 능동형 정류방식을 제안하여 저전압 전원의 이용이 가능하고 전력선 부하에 의해 발생하는 고조파 발생을 줄이며 또한, 기존의 방식에서 사용하는 상치환변압기를 제거하여 경제적인 이점도 얻고자 하였다. 현재 대형선박에서 운용중인 전기추진시스템에 제안한 시스템을 시뮬레이션 한 결과, 추진전동기 입력 전류 및 전압 파형에 포함된 총고조파왜형율이 개선됨을 나타내었다.

• Journal of Power Electronics
• /
• 제16권6호
• /
• pp.1991-2004
• /
• 2016

An LC filter is required to reduce the output current ripple in the auxiliary resonant snubber inverter (ARSI) for high-performance applications. However, if the traditional control method is used in the ARSI with LC filter, then unnecessary current flows in the auxiliary circuit. In addressing this problem, a novel load-adaptive control that fully uses the filter inductor current ripple to realize the soft-switching of the main switches is proposed. Compared with the traditional control implemented in the ARSI with LC filter, the proposed control can reduce the required auxiliary current, contributing to higher efficiency and DC-link voltage utilization. In this study, the detailed circuit operation in the light load mode (LLM) and the heavy load mode (HLM) considering the inductor current ripple is described. The characteristics of the improved ARSI are expressed mathematically. A prototype with 200 kHz switching frequency, 80 V DC voltage, and 8 A maximum output current was developed to verify the effectiveness of the improved ARSI. The proposed ARSI was found to successfully operate in the LLM and HLM, achieving zero-voltage switching (ZVS) of the main switches and zero-current switching (ZCS) of the auxiliary switches from zero load to full load. The DC-link voltage utilization of the proposed control is 0.758, which is 0.022 higher than that of the traditional control. The peak efficiency is 91.75% at 8 A output current for the proposed control, higher than 89.73% for the traditional control. Meanwhile, the carrier harmonics is reduced from -44 dB to -66 dB through the addition of the LC filter.