• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.134-137
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• 1989

A digital controller for a discrete-data control system can take many forms. For example, they can be passive RC networks, general purpose digital computers, special purpose of mini-computer, and delay lines. With the recent advent of the microprocessor, its use as a digital controller is evident. This work discusses the hardware and software development of a microprocessor-based digital controller for a discrete-data control system. A second-order, Type 1 system is implemented on an analog computer; a Intel 80-286 microprocessor is used to implemented the controller; and, output response are obtained for step, ramp, and parabolic inputs. The results demonstrate that the microprocessor has potential as a digital controller. Finally, a brief discussion on the results indicate possible areas of improvement of the controller and future investigation.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.4
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• pp.207-213
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• 2002

The paper introduces a switched reluctance motor drive system based on an 80C31 and an Intel 80C 196KB single-chip microprocessor control. Advance schemes are used in turn-on and turn-off angles with the power converter's main switches during traction and regenerative braking. The principles of traction speed control and braking torque control are given. The hardware and software patterns in the 80c31 and the Intel 80C196KB single-chip microprocessor control system are also presented.

• ETRI Journal
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• v.26 no.6
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• pp.513-519
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• 2004

This paper presents a low power 16-bit adiabatic reduced instruction set computer (RISC) microprocessor with efficient charge recovery logic (ECRL) registers. The processor consists of registers, a control block, a register file, a program counter, and an arithmetic and logical unit (ALU). Adiabatic circuits based on ECRL are designed using a $0.35{\mu}m$ CMOS technology. An adiabatic latch based on ECRL is proposed for signal interfaces for the first time, and an efficient four-phase supply clock generator is designed to provide power for the adiabatic processor. A static CMOS processor with the same architecture is designed to compare the energy consumption of adiabatic and non-adiabatic microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is about 1/3 compared to that of the static CMOS microprocessor.

• Journal of Korean Society for Quality Management
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• v.28 no.1
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• pp.27-40
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• 2000

Technological forecasting for microprocessor market can provide timely insight into the prospects for significant technological changes in computer hardware as well as software. In this paper, we use bibliometrics to forecast R&D trend on microprocessor technology. Cumulative numbers of US Patents on several generations of microprocessor technology (pipeline, superpipeline, supersclar and VLIW) approved since 1980 are applied to fit diffusion models. Our study results provide both the maximum market potential and the maturity time for each generation of microprocessor technology. Such information is expected to make contribution on making better decisions with regard to strategic corporate planning, R&D management, product development and investment in new technology of microprocessor.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.408-411
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• 1999

Microarchitecture simulator is an important tool to verify and optimize the microarchitecture of a new microprocessor. Moreover. it can be use as a performance simulator to estimate the target microprocessor′s performance. And system software designers can use it as a software developing environment. This paper describes a "microarchitecture simulator for on-chip Multiprocessor microprocessor". It is a program-driven and cycle-based simulator that can execute simultaneous mutithreading benchmarks. We verified the microarchitecture of a new on-chip multiprocessor microprocessor with it and did performance simulations to estimate the performance of the on-chip multiprocessor microprocessor.

• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.3
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• pp.19-27
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• 1979

Microprocessor based digital filter was designed rising focus number system in order to increase the multiplication speed of microprocessor program. Addition and subtraction program was treated using look up table. The sampling speed was improved up to 500 samples per seconds on the third-order low- Pass digital filters.

• The Journal of Korean Association of Computer Education
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• v.21 no.6
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• pp.1-14
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• 2018

The purpose of this study was to identify the teachers' competency for the NCS-based microprocessor course in the 'electronic,' and analyzed the relative importance among vocational teachers' competencies. Findings were (1) the teaching competencies for the microprocessor course consists of 8 major factors and 22 sub-factors, and (2) the AHP gained the result of the relative importance of the teaching competencies. In conclusion, the programming was identified as the most critical competency, suggested a guidelines for Microprocessor course to use in vocational schools.

• Proceedings of the KIEE Conference
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• 1990.11a
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• pp.375-379
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• 1990

A microprocessor-based multi-function switchgear for the protection, measurement and control of the power system is presented. For the extraction of the RMS values of the fundamental components of current and voltage signals, a simple digital filter based on cross-correlation of the distorted signal with even and odd heptagonal waves is used. The frequency response of this filter is almost identical to that of the filter based on the discrete fourier transform, while its computational requirement is far less. For the time delay element relaying, a new log-table based relaying algorithm is suggested. The suggested use of the heptagonal wave cross-correlation digital filter algorithm and a new relaying algorithm reduce the computational needs so drastically that all functions of the switchgear can be implemented on the microprocessor system. Real time testing of the implemented daboratory prototype show good practical response under different operating conditions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.83-90
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• 2004

In this paper, we proposed a new instruction set(X32Y ISA) with 3 different types of instruction mode. The proposed instruction set organizes 32-bit, 24-bit, 16-bit instruction in order to solves a problem of memory size limitation in an embedded microprocessor. We designed a 32-bit 5 stage pipeline RISC microprocessor based on the X32V ISA. To verify the proposed the X32V ISA and a microprocessor, we estimated a program code size of multimedia application programs using a X32V simulator. In result, we verified that the Light mode and the Ultra Light mode obtains 8%, 27% reduction of a program code size through comparison with the Default mode. The proposed microprocessor was verified all X32V instructions execution at Xilinx FPGA with 33MHz operating frequency,

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.886-889
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• 2003

In this paper a design of educational robot based on a PC and/or a microprocessor is discussed. The educational robot has 5 DOF and Is made with Swiss Mini Servomotor and Motor Controller IC LM629N. Also, a GUI(Graphical User Interface) is programmed by Visual Basic. This system is completed to consider control properties of the educational robot with 5-DOF that can be changed the parameter of controller by software.