• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.134-137
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• 1989

A digital controller for a discrete-data control system can take many forms. For example, they can be passive RC networks, general purpose digital computers, special purpose of mini-computer, and delay lines. With the recent advent of the microprocessor, its use as a digital controller is evident. This work discusses the hardware and software development of a microprocessor-based digital controller for a discrete-data control system. A second-order, Type 1 system is implemented on an analog computer; a Intel 80-286 microprocessor is used to implemented the controller; and, output response are obtained for step, ramp, and parabolic inputs. The results demonstrate that the microprocessor has potential as a digital controller. Finally, a brief discussion on the results indicate possible areas of improvement of the controller and future investigation.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제2B권4호
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• pp.207-213
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• 2002

The paper introduces a switched reluctance motor drive system based on an 80C31 and an Intel 80C 196KB single-chip microprocessor control. Advance schemes are used in turn-on and turn-off angles with the power converter's main switches during traction and regenerative braking. The principles of traction speed control and braking torque control are given. The hardware and software patterns in the 80c31 and the Intel 80C196KB single-chip microprocessor control system are also presented.

• ETRI Journal
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• 제26권6호
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• pp.513-519
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• 2004

This paper presents a low power 16-bit adiabatic reduced instruction set computer (RISC) microprocessor with efficient charge recovery logic (ECRL) registers. The processor consists of registers, a control block, a register file, a program counter, and an arithmetic and logical unit (ALU). Adiabatic circuits based on ECRL are designed using a $0.35{\mu}m$ CMOS technology. An adiabatic latch based on ECRL is proposed for signal interfaces for the first time, and an efficient four-phase supply clock generator is designed to provide power for the adiabatic processor. A static CMOS processor with the same architecture is designed to compare the energy consumption of adiabatic and non-adiabatic microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is about 1/3 compared to that of the static CMOS microprocessor.

• 품질경영학회지
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• 제28권1호
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• pp.27-40
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• 2000

Technological forecasting for microprocessor market can provide timely insight into the prospects for significant technological changes in computer hardware as well as software. In this paper, we use bibliometrics to forecast R&D trend on microprocessor technology. Cumulative numbers of US Patents on several generations of microprocessor technology (pipeline, superpipeline, supersclar and VLIW) approved since 1980 are applied to fit diffusion models. Our study results provide both the maximum market potential and the maturity time for each generation of microprocessor technology. Such information is expected to make contribution on making better decisions with regard to strategic corporate planning, R&D management, product development and investment in new technology of microprocessor.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.408-411
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• 1999

Microarchitecture simulator is an important tool to verify and optimize the microarchitecture of a new microprocessor. Moreover. it can be use as a performance simulator to estimate the target microprocessor′s performance. And system software designers can use it as a software developing environment. This paper describes a "microarchitecture simulator for on-chip Multiprocessor microprocessor". It is a program-driven and cycle-based simulator that can execute simultaneous mutithreading benchmarks. We verified the microarchitecture of a new on-chip multiprocessor microprocessor with it and did performance simulations to estimate the performance of the on-chip multiprocessor microprocessor.

• 대한전자공학회논문지
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• 제16권3호
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• pp.19-27
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• 1979

디지탈 필타를 마이크로프로세서를 이용하여 설계하였다. 포커스 수를 사용하여 수를 표시하므로서 승제산을 고속화하였고, 가감산은 환산표를 활용하여 처리하였다. 이리하여 삼차의 저역통과 디지탈 필타의 샘플이 500 (samples/sec)까지 처리 되었다.

• 컴퓨터교육학회논문지
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• 제21권6호
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• pp.1-14
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• 2018

NCS 기반 교육과정의 전문교과 교사는 더욱 전문화된 교수역량을 필요로 한다. 본 연구는 NCS 기반 교육과정 '전자' 교과의 마이크로프로세서 교육을 위한 교수역량을 규명하고, 역량 간 상대적 중요도를 분석하였다. 주요 연구 분석결과는 첫째, NCS 기반 교육과정 '전자' 교과에서 마이크로프로세서 교육을 위한 교수역량은 8개의 주요 역량과 22개의 하위 역량으로 구성되었다. 둘째, 주요역량 간, 각 하위 역량 간 상대적 중요도 조사에서 각각 '소스코드 작성 역량'과 '타겟 시스템 회로도 활용 소스코드 작성 역량'이 최고 순위이다. 본 연구는 전자 교과의 핵심이 되는 마이크로프로세서 교육의 내용과 방법에 대한 개선 및 교사역량 강화를 제안하며, 직업교육 체계화를 위한 가이드라인을 제시하였다. 또한 교수역량 요소를 통해 교사 역량 개발을 위한 전략 수립에 기여할 것으로 기대된다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 추계학술대회 논문집 학회본부
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• pp.375-379
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• 1990

A microprocessor-based multi-function switchgear for the protection, measurement and control of the power system is presented. For the extraction of the RMS values of the fundamental components of current and voltage signals, a simple digital filter based on cross-correlation of the distorted signal with even and odd heptagonal waves is used. The frequency response of this filter is almost identical to that of the filter based on the discrete fourier transform, while its computational requirement is far less. For the time delay element relaying, a new log-table based relaying algorithm is suggested. The suggested use of the heptagonal wave cross-correlation digital filter algorithm and a new relaying algorithm reduce the computational needs so drastically that all functions of the switchgear can be implemented on the microprocessor system. Real time testing of the implemented daboratory prototype show good practical response under different operating conditions.

• 대한전자공학회논문지SD
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• 제41권4호
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• pp.83-90
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• 2004

본 논문은 메모리 크기의 제약을 많이 받는 내장형 마이크로프로세서의 문제를 해결하기 위해 32-bit 명령어와 24-bit, 16-bit 명령어를 혼합 사용하여 3가지 명령어 모드를 갖는 새로운 명령어 셋(X32V ISA)을 제안하였으며, 이를 기반으로 32-bit 5 stage pipeline RISC 마이크로프로세서를 설계하였다. 이를 검증하기 위해서 X32V ISA 전용 시뮬레이터를 이용하여 멀티미디어 프로그램의 프로그램 코드 사이즈를 산출하였다. 그 결과로 Light mode와 Ultra light mode는 Default mode에 비해 각각 최소 8%, 27%의 프로그램 코드 사이즈 감소를 확인하였으며, Xilinx FPGA를 이용하여 33MHz 동작 환경에서 X32V ISA의 모든 명령어 수행을 검증하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.886-889
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• 2003

In this paper a design of educational robot based on a PC and/or a microprocessor is discussed. The educational robot has 5 DOF and Is made with Swiss Mini Servomotor and Motor Controller IC LM629N. Also, a GUI(Graphical User Interface) is programmed by Visual Basic. This system is completed to consider control properties of the educational robot with 5-DOF that can be changed the parameter of controller by software.