• 대한전기학회논문지
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• 제41권9호
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• pp.1013-1020
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• 1992

The conductivity variation of a high resistivity bulk silicon semiconductor, whose electrodes were deposited with aluminum vapor, was studied experimentally by measuring the X-ray intensity and current flow, which was developed by X-ray radiation while applying a pulse voltage to the silicon, in a load resistor connected to the semiconductor. The current flow observed immediately as the X-ray radiated, and when the X-ray decreased. It was found from the observation of switching current for the X-ray intensity and the voltage applied in the semiconductor that the switching current of the semiconductor increased as the intensity of the X-ray and the applied voltage increased. In case of lower applied voltage, the switching current for higher applied voltage depended on the intensity of the X-ray radiated due to the saturation of electron and hole.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권2호
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• pp.109-116
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• 1999

ZnO Varistor is an electronic ceramic device to absorb the surge voltage from low voltage to high. To investigate the puncture mechanism occurring in NnO varistor, the Voronoi simulation for formulating the relation between the applied voltage and the increase of the temperature inside grain is applied. The Voronoi network can realize the structure of the practical varistor better than the established simple network. Using the current through each grain and the voltage applied to the grain, Joule heating energy is calculated and the phenomenon that the puncture occurs can be analyzed quantitatively by simulating the electric and thermal characteristics according to the externally applied pulsed voltage.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.446-449
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• 2008

Organic light emitting diodes (OLEDs) with multiple organic layers were fabricated to obtain and to evaluate an equivalent resistance and an equivalent capacitance of OLED device. The staircase voltage with an increasing period and a constant period was designed and applied to the OLED. The resistance of OLED was found to decrease from $270\;k{\Omega}$ to $2\;K{\Omega}$ as applied voltage increased after turn on. The equivalent capacitance of OLED maintained unchanged at low voltage level and deceased after showing peak value as the applied voltage increased.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.1258-1261
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• 2005

The ramp type bias voltage applied to the common electrode during a reset-period is newly proposed to lower the background luminance and to improve the address discharge characteristics in AC-PDP. The positive ramp bias voltage is applied during the ramp-up period, whereas the negative ramp bias voltage is applied during the ramp-down period. The effects of the voltage slopes in both the positive and negative ramp bias voltages on the background luminance and address voltage characteristics are examined intensively. It is observed that the optimized positive and negative ramp bias voltages applied to the common electrode during the ramp-period can lower the background luminance and also enhance the address discharge characteristics of the AC-PDP.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.215-217
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• 2001

This paper describes an all solid-state switch pulse generator for various applications where square pulse voltage is required. The pulse generator produces various voltage pulses: voltage $5{\sim}100kV$. current $10{\sim}200A$, pulse width $1{\sim}10{\mu}sec$, repetition rate up to 500Hz. The output power is the combination of these parameters up to 10kW. It consists of a DC-DC converter and several pulse generating modules which are connected in series to obtain higher pulse voltage. Each module contains semiconductor switches (IGBT's), energy storage capacitors and control units to trigger switches. The structure and operational principle are described and the protection circuit for reliable operation is suggested. Experimental results show that the pulse generator can be used for applications with nonlinear loads.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.54-57
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• 2002

In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

• 한국전기전자재료학회논문지
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• 제16권1호
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• pp.5-10
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• 2003

In this study, a new programming method to minimize the generation of Si-SiO$_2$interface traps of SONOS nonvolatile memory device as a function of number of porgram/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate. forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and dram are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics or SONOS devices because electrical stress applied to the Si-SiO$_2$interface is reduced due to short program time.

• 전기학회논문지
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• 제56권8호
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• pp.1445-1449
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• 2007

This paper presents the DOD (Drop-On-Demand) characteristic using the electrostatic field induced inkjet printing system. In order to achieve the DOD characteristic of electrostatic field induced inkjet printing, applied the bias voltage of 1.4 kV and the pulse voltage of $2.0\;kV\;{\sim}\;2.7\;kV$ using high voltage pulse generator. Electrostatic field induced droplet ejection is directly observed using a high-speed camera and for investigated DOD characteristic, CNT ink used. The electrostatic field induced inkjet head system has DOD characteristic using pulse generator which can be applied pulse voltage. The bias voltage has a good condition which form meniscus and has micro dripping mode for small size micro droplet. Also, the droplet size decreases with increasing the applied pulse voltage. This paper shows DOD characteristic at electrostatic field induced inkjet head system, Therefore. electrostatic DOD inkjet head system will be applied industrial area comparing conventional electrostatic inkjet head system.

• 한국초전도ㆍ저온공학회논문지
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• 제13권1호
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• pp.46-50
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• 2011

The electrical insulation design of high voltage superconducting fault current limiters (SFCLs) should be confirmed to be applied for the stabilization of the power grid. This paper describes numerical analysis and AC dielectric experiments for developing high voltage SFCLs. The electric field distributions between applied high voltage part and ground were calculated by finite element method (FEM) simulation tool and AC criterion of liquid nitrogen at 200 kPa was calculated from correlation between the field utilization factor and FEM simulation results. This paper deals with ceonceptual insulation design of a 154 kV class single-phase no-inductively wound solenoid type SFCL which was focused on gap distance between the cryostat and superconducting coils. Furthermore, the shield ring effect was confirmed to reduce maximum electric field at applied high voltage part.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2000년도 학술대회논문집
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• pp.155-159
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• 2000

This paper describes the self healing characteristics of metalized polypropylene film(MPPF) under ac condition. PDs were generally observed at relatively low voltage, and the PDIVs were differently varied depending on the number of pre-self healing due to void defects. Several pre-self healing events took place at lower voltage than the critical breakdown voltage of PPF. Self healing mainly occurred at pin tips, wrinkle sides, and cross points of wrinkles. The applied voltage at self healing was increased with PPF thickness. The burn out area at self healing was also increased with the applied voltage and PPF thickness. The peak currents in a grounding conductor at self healing was also increased with the applied voltage.