• Title/Summary/Keyword: XSCALE

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Application of Xscale-Based Mobile Device to Motor Control (Xscale 기반의 Mobile Device를 활용한 모터 제어)

  • Han, Chul-Wan;Kim, Kab-Il;Son, Young-Ik
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.717-719
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    • 2004
  • Currently mobile devices change rapidly our life and they have considerable influences over many parts of our society. If the mobile device is applied to a control system, the usability of the control system is increased with its convenient accessibility and mobility. This paper realizes a motor control system by using a mobile device. The device uses Intel Xscale PXA-250 in which Widows CE is ported. The device is very popular at the applications of mobile devices. Also we consider its application to a mobile robot such as home service robot.

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Implementation of Worst Case Execution Time Analysis Tool For Embedded Software based on XScale Processor (XScale 프로세서 기반의 임베디드 소프트웨어를 위한 최악실행시간 분석도구의 구현)

  • Park, Hyeon-Hui;Choi, Myeong-Su;Yang, Seung-Min;Choi, Yong-Hoon;Lim, Hyung-Taek
    • The KIPS Transactions:PartA
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    • v.12A no.5 s.95
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    • pp.365-374
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    • 2005
  • Schedulability analysis is necessary to build reliable embedded real-time systems. For schedulability analysis, worst-case execution time(WCET) analysis that computes upper bounds of the execution times of tasks, is required indispensably. WCET analysis is done in two phases. The first phase is high-level analysis that analyzes control flow and finds longest paths of the program. The second phase is low-level analysis that computes execution cycles of basic blocks taking into account the hardware architecture. In this thesis, we design and implement integrated WCET analysis tools. We develop the WCET analysis tools for XScale-based system called WATER(WCET Analysis Tool for Embedded Real-time system). WATER consist of high-level flow analyzer and low-level execution time analyzer. Also, We compare real measurement for execution of program with analysis result calculated by WATER.

An embedded vision system based on an analog VLSI Optical Flow vision sensor

  • Becanovic, Vlatako;Matsuo, Takayuki;Stocker, Alan A.
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.285-288
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    • 2005
  • We propose a novel programmable miniature vision module based on a custom designed analog VLSI (aVLSI) chip. The vision module consists of the optical flow vision sensor embedded with commercial off-the-shelves digital hardware; in our case is the Intel XScale PXA270 processor enforced with a programmable gate array device. The aVLSI sensor provides gray-scale imager data as well as smooth optical flow estimates, thus each pixel gives a triplet of information that can be continuously read out as three independent images. The particular computational architecture of the custom designed sensor, which is fully parallel and also analog, allows for efficient real-time estimations of the smooth optical flow. The Intel XScale PXA270 controls the sensor read-out and furthermore allows, together with the programmable gate array, for additional higher level processing of the intensity image and optical flow data. It also provides the necessary standard interface such that the module can be easily programmed and integrated into different vision systems, or even form a complete stand-alone vision system itself. The low power consumption, small size and flexible interface of the proposed vision module suggests that it could be particularly well suited as a vision system in an autonomous robotics platform and especially well suited for educational projects in the robotic sciences.

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Power system protection IED design using an embedded processor (임베디드 프로세서를 이용한 계통 보호 IED 설계)

  • Yoon, Ki-Don;Son, Young-Ik;Kim, Kab-Il
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.711-713
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    • 2004
  • In the past time, the protection relay did only a protection function. Currently, its upgraded device i.e. IED(Intelligent Electric Device) has been designed to protect, control, and monitor the whole power system automatically. Also the device is desired to successfully measure important elements of the power system. This paper considers design method of a digital protection IED with a function of measuring various elements and a communication function. The protection IED is composed of the specific function modules that are signal process module, communication module, input/output module and main control module. A signal process module use a DSP processor for analysis of input signal. Main control module use a embedded processor, Xscale, that has an ARM Core. The communication protocol uses IEC61850 protocol that becomes standard in the future. The protection IED is able to process mass information with high-performance processor. As each function module is designed individually, the reliability of the device can be enhanced.

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The study on implementing next generation telematics terminal (XSCALE 기반 차세대 텔레메틱스 단말기 구현에 관한 연구)

  • 정승호;김영길
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.492-495
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    • 2003
  • 최근에 새롭게 출현하고 있는 텔레매틱스는 통신(telecommunication)과 정보과학(informatics)의 합성어로 무선망을 통한 음성 및 데이터 통신과 GPS을 기반으로 차량에 정보를 주고받음으로서 새로운 부가 서비스를 제공하는 기술을 의미한다. 텔레매틱스 무선 네트워크의 연결을 위해 여러 가지 통신방식이 사용되고 있으며 이동통신 기술의 발전에 따라 그 행보를 같이 하고 있다. 한편, 텔레매틱스 서비스의 중심에 있는 차량용 단말기는 이러한 여러 무선망과의 연결뿐만 아니라 위치기반 서비스, entertainment, 응급구조, office 서비스 둥을 지원하기 알맞게 설계 되야 한다. 본 논문에서는 이러한 요구에 부합할 수 있는 임베디드 시스템을 구현하여 제시하여 본다.

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Dynamic Power Management using Dynamic Frequency Scaling in Embedded System (임베디드 시스템에서 DFS 기법을 이용한 동적 전력 관리)

  • Kwon, Ki-Hyeon;Kim, Nam-Yong;Byun, Hyung-Gi
    • Journal of Digital Contents Society
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    • v.10 no.2
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    • pp.217-223
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    • 2009
  • In order to decrease the power consumption in Embedded Linux environment based on XScale PXA255, We produce the device driver of DFS(Dynamic Frequency Scaling) technique, design and implement the middleware DFM(Dynamic Frequency Management) to scale the power of embedded target board with porting this device drive, suggest the method to reduce the Embedded system's power consumption.

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An Implementation of Embedded SIP User Agent under Wireless LAN Area (Wireless LAN 환경에서 임베디드 SIP User Agent 구현)

  • Park Seung-Hwan;Lee Jae-Heung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.493-497
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    • 2005
  • This paper is about the research of the User Agent implementation under wireless embedded environment, using SIP which is one of protocol components construct the VoIP system. The User Agent is made of the User Agent configuration block, the device thread block to control devices and the SIP stack block to process SIP messages. The device thread consists of the RTP thread and the sound lard device processing block. Futhermore, the SIP stack consist of the worker thread to process proxy events, the SIP transceiver and SIP thread to transfer and receive SIP messages. The H/W platform is a board included the Intel's XScale PXA255 processor, flash memory, SDRAM, Audio CODEC module and wireless LAN threough PCMCIA socket, furthermore a microphone and headphone is used by the audio 1/0. The system has embedded linux kernel 2.4.19. For embedded environment, the function of User Agent and SIP method is diminished. Finally, the resource of system could be reduced about $12.9\%$, compared to overall system resource, by minimizing peripherals control and excepting TCP.

Real-time processing system for embedded hardware genetic algorithm (임베디드 하드웨어 유전자 알고리즘을 위한 실시간 처리 시스템)

  • Park Se-hyun;Seo Ki-sung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.7
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    • pp.1553-1557
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    • 2004
  • A real-time processing system for embedded hardware genetic algorithm is suggested. In order to operate basic module of genetic algorithm in parallel, such as selection, crossover, mutation and evaluation, dual processors based architecture is implemented. The system consists of two Xscale processors and two FPGA with evolvable hardware, which enables to process genetic algorithm efficiently by distributing the computational load of hardware genetic algorithm to each processors equally. The hardware genetic algorithm runs on Linux OS and the resulted chromosome is executed on evolvable hardware in FPGA. Furthermore, the suggested architecture can be extended easily for a couple of connected processors in serial, making it accelerate to compute a real-time hardware genetic algorithm. To investigate the effect of proposed approach, performance comparisons is experimented for an typical computation of genetic algorithm.

A Study on Photonic sensor Interface in SOPC platform (SOPC기반 광-센서 인터페이스에 관한 연구)

  • Son, Hong-Bum;Park, Seong-Mo
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.971-974
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    • 2005
  • In this paper, we describe photonic sensor interface in SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. We use two development kits. The one is embedded kit that using Intel's Xscale device, the another is SOPC kit that using Altera's Excalibur device. We implement some device logic that DMAC, ADCC, etc. and application.

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