• Journal of the Korea Institute of Information Security & Cryptology
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• v.13 no.3
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• pp.27-34
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• 2003

Recently, an efficient hardware development for a cryptosystem is concerned. The efficiency of a multiplier for GF($2^n$)is directly related to the efficiency of some cryptosystem. This paper, considering the trade-off between time complexity andsize complexity, proposes a new multiplier architecture having n[n/2] AND gates and n([n/2]+1)- $$\Delta$_n$ = XOR gates, where $$\Delta$_n$=1 if n is even, $$\Delta$_n$=0 otherwise. This size complexity is less than that of existing ${multipliers}^{[5][12]}$which are $n^2$ AND gates and $n^2$-1 XOR gates. While a new multiplier is a serial-parallel multiplier to output a result of multiplication of two elements of GF($2^n$) after 2 clock cycles, the suggested multiplier is more suitable for some cryptographic device having space limitations.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1240-1243
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• 2003

In this paper, an encryption method to share a secret binary image is proposed. It divides the image to be encrypted into an arbitrary number of images and encrypts them using XOR process with different binary random images which was prepared by the means of the XOR process, too. Each encrypted slice image can be distributed to the authenticated ones. However, we transfer the encrypted images to the binary phase masks to strengthen the security power, that means phase masks can not be copied with general light-intensity sensitive tools such as CCDs or cameras. For decryption, we used the Mach-Zehnder interferometer in which linearly polarized two light beams in orthogonal direction, respectively. The experimental result proved the efficiency of the proposed method.

• Proceedings of the Korean Information Science Society Conference
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• 2002.04a
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• pp.892-894
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• 2002

본 논문은 유한 체 GF(/2 sup m/)상에서 A$B^2$연산을 위해 AOP(All One Polynomial)에 기반한 새로운 MSB(Most Significant bit) 유선 알고리즘을 제시하고, 제시한 알고리즘에 기반하여 병렬 입출력 세미시스톨릭 구조를 제안한다. 제안된 구조는 표준기저(standard basis)에 기반하고 모듈라(modoular) 연산을 위해 다항식의 계수가 모두 1인 m차의 기약다항식 AOP를 사용한다. 제안된 구조에서 AND와 XOR게이트의 딜레이(deray)를 각각 /D sub AND$_2$/와/D sub XOR$_2$/라 하면 각 셀 당 임계경로는 /D sub AND$_2$+D sub XOR/이고 지연시간은 m+1이다. 제안된 구조는 기존의 구조보다 임계경로와 지연시간 면에서 보다 효율적이다. 또한 구조 자체가 정규성, 모듈성, 병렬성을 가지기 때문에 VLSI 구현에 효율적이다. 더욱이 제안된 구조는 유한 체상에서 지수 연산을 필요로 하는 Diffie-Hellman 키 교환 방식, 디지털 서명 알고리즘 및 EIGamal 암호화 방식과 같은 알고리즘을 위한 기본 구조로 사용할 수 있다. 이러한 알고리즘을 응용해서 타원 곡선(elliptic curve)에 기초한 암호화 시스템(Cryptosystem)의 구현에 사용될 수 있다.

• Journal of Korea Multimedia Society
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• v.19 no.6
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• pp.1043-1051
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• 2016

In this paper, double encryption technique of binary image using random phase mask and 2-step phase-shifting digital holography is proposed. After phase modulating of binary image, firstly, random phase mask to be used as key image is generated through the XOR operation with the binary phase image. And the first encrypted image is encrypted again through the fresnel transform and 2-step phase-shifting digital holography. In the decryption, simple arithmetic operation and inverse Fresnel transform are used to get the first decryption image, and second decryption image is generated through XOR operation between first decryption image and key image. Finally, the original binary image is recovered through phase modulation.

• Journal of Electrical Engineering and information Science
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• v.3 no.1
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• pp.8-13
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• 1998

Often ESOP(Exclusive Sum of Products) expressions provide more compact representations of logic functions and implemented circuits are known to be highly testable. Motivated by the merits of using XOR(Exclusive-OR) gates in circuit design, ESOP(Exclusive Sum of Products) expressions are considered s the input to the logic synthesis for random pattern testability. The problem of interest in this paper is whether ESOP expressions provide better random testability than corresponding SOP expressions of the given function. Since XOR gates are used to collect product terms of ESOP expression, fault propagation is not affected by any other product terms in the ESOP expression. Therefore the test set for a fault in ESOP expressions becomes larger than that of SOP expressions, thereby providing better random testability. Experimental results show that in many cases, ESOP expressions require much less random patterns compared to SOP expressions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.20-27
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• 2008

In this paper, a nonlinear classifier of a feed-forward neural network is implemented on an FPGA chip. The feedforward neural network is implemented in hardware for fast parallel processing. After off line training of neural network, weight values are saved and used to perform forward propagation of neural processing. As an example, AND and XOR digital logic classification is conducted in off line, and then weight values are used in neural network. Experiments are conducted successfully and confirmed that the FPGA neural network hardware works well.

• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2735-2737
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• 2001

비젼 검사시스템에서 기판에 존재하는 납 형상의 패턴을 분류함으로써 사전에 불량을 줄일 수 있다. 이러한 경우 대부분의 불량은 부정확한 납의 위치 및 두께로 인해 발생하게 되는데, 이러한 문제를 해결하기 위해 주어진 경계 내에 불분명하게 형성된 납의 형태 및 두께를 정상과 불량으로 분류하기 위해 무게중심점에 기초한 정합과 XOR연산을 이용한 비젼 검사시스템을 제안하였다. 제안한 비젼 검사시스템을 인쇄회로기판상의 납땜형상 패턴에 적용하여 제안한 방법의 성능을 검증하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.2
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• pp.457-476
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• 2011

This paper presents an improved XOR-based Data Hiding Scheme (XDHS) to hide a halftone image in more than two halftone stego images. The hamming weight and hamming distance is a very important parameter affecting the quality of a halftone image. For this reason, we proposed a method that involves minimizing the hamming weights and hamming distances between the stego image and cover image in $2{\times}2$-pixel grids. Moreover, our XDHS adopts a block-wise operation to improve the quality of a halftone image and stego images. Furthermore, our scheme improves security by using a block-wise operation with A-patterns and B-patterns. Our XDHS method achieves a high quality with good security compared to the prior arts. An experiment verified the superiority of our XDHS compared with previous methods.

• Journal of the Optical Society of Korea
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• v.19 no.3
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• pp.222-227
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• 2015

We propose a new and potentially integrable scheme for the realization of an all-optical binary full adder employing two XOR gates, two AND gates, and one OR gate. The XOR gate is realized using a Mach-Zehnder interferometer (MZI) based on a semiconductor optical amplifier (SOA). The AND and OR gates are based on the nonlinear properties of a semiconductor optical amplifier. The proposed scheme is driven by two input data streams and a carry bit from the previous less-significant bit order position. In our proposed design, we achieve extinction ratios for Sum and Carry output signals of 10 dB and 12 dB respectively. Successful operation of the system is demonstrated at 10 Gb/s with return-to-zero modulated signals.

• Proceedings of the Korea Information Processing Society Conference
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• 2013.05a
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• pp.556-559
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• 2013

클라우드 컴퓨팅 환경에서는 사용자의 데이터를 수많은 분산서버를 이용하여 데이터를 암호화하여 저장한다. 구글, 야후 등 글로벌 인터넷 서비스 업체들은 인터넷 서비스 플랫폼의 중요성을 인식하고 자체 연구 개발을 수행, 저가 상용 노드를 기반으로 한 대규모 클러스터 기반의 클라우드 컴퓨팅 플랫폼 기술을 개발 활용하고 있다. 이와 같이 분산 컴퓨팅 환경에서 다양한 데이터 서비스가 가능해지면서 대용량 데이터의 분산관리가 주요 이슈로 떠오르고 있다. 한편, 대용량 데이터의 다양한 이용 형태로부터 악의적인 공격자나 내부 사용자에 의한 보안 취약성 및 프라이버시 침해가 발생할 수 있다. 이러한 문제점을 해결하기 위해 본 논문에서는 XOR기반의 효율적인 분산 저장 및 복구 기법을 제안하였다.