• 제목/요약/키워드: Worst case

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차량자세제어 최악상황 개발 및 UCC HILS 시스템 기반 성능 평가 (Worst-case Development and Evaluation for Vehicle Dynamics Controller in UCC HILS)

  • 김진용;정도현;정창현;최형진
    • 한국자동차공학회논문집
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    • 제19권6호
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    • pp.30-36
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    • 2011
  • The current test methods are insufficient to evaluate and ensure the safety and reliability of vehicle system for all possible dynamic situation including the worst case such as rollover, spin-out and so on. Although the known NHTSA Sine with dwell steering maneuvers are applied for the vehicle performance assessment, they aren't enough to estimate other possible worst case scenarios. Therefore, it is crucial for us to verify the various worst cases including the existing severe steering maneuvers. This paper includes useful worst case based upon the existing worst case scenarios mentioned above and worst case evaluation for vehicle dynamic controller in simulation basis and UCC HILS. The only human steering angle is selected as a design parameter here and optimized to maximize the index function to be expressed in terms of both yaw rate and side slip angle. The obtained scenarios were enough to generate the worst case to meet NHTSA worst case definition. It has been concluded that the new procedure in this paper is adequate to create other feasible worst case scenarios for a vehicle dynamic control system.

주행 안정성을 고려한 최악 상황 시나리오 도출 및 적용 (Worst Case Scenario Generation on Vehicle Dynamic Stability and Its Application)

  • 정대이;정도현;문기현;정창현;노기한;최형진
    • 한국자동차공학회논문집
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    • 제16권6호
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    • pp.1-9
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    • 2008
  • The current test methods are insufficient to evaluate and ensure the safety and reliability of vehicle system for all possible dynamic situation including the worst case such as rollover, spin-out and so on. Although the known NHTSA J-turn and Fish-hook steering maneuvers are applied for the vehicle performance assessment, they aren't enough to estimate other possible worst case scenarios. Therefore, it is crucial for us to verify the various worst cases including the existing severe steering maneuvers. This paper includes the procedure to search for other useful worst case based upon the existing worst case scenarios mentioned above and its application in simulation basis. The only human steering angle is selected as a design parameter here and optimized to maximize the index function to be expressed in terms of either roll angle or yaw rate. The obtained scenarios were enough to generate the worst case to meet NHTSA worst case definition (ex.2-inch wheel lift). Additionally, as an application, the worst case steering maneuver is acquired for the vehicle to operate with a simple ESP system. It has been concluded that the new procedure in this paper is adequate to create other feasible worst case scenarios for a vehicle system both with an intelligent safety control system and without it.

Worst Average Queueing Delay of Multiple Leaky-Bucket-Regulated Streams and Jumping-Window Regulated Stream

  • Lee, Daniel C.
    • Journal of Communications and Networks
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    • 제6권1호
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    • pp.78-87
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    • 2004
  • This paper presents deterministic, worst-case analysis of a queueing system whose multiple homogeneous input streams are regulated by the associated leaky buckets and the queueing system that has a single stream regulated by the jumping-window. Queueing delay averaged over all items is used for performance measure, and the worst-case input traffic and the worst-case performance are identified for both queueing systems. For the former queueing system, the analysis explores different phase relations among leaky-bucket token generations. This paper observes how the phase differences among the leaky buckets affect the worst-case queueing performance. Then, this paper relates the worst-case performance of the former queueing system with that of the latter (the single stream case, as in the aggregate streams from many users, whose item arrivals are regulated by one jumping-window). It is shown that the worst-case performance of the latter is identical to that of the former in which all leaky buckets have the same phase and have particular leaky bucket parameters.

Optimizing Instruction Prefetching to Improve Worst-Case Performance for Real-Time Applications

  • Ding, Yiqiang;Yan, Jun;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • 제3권1호
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    • pp.59-71
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    • 2009
  • While the average-case performance is important for general-purpose applications, worst-case performance is crucial for real-time systems to ensure schedulability and reliability. Recent work has shown that simple prefetching techniques such as the Next-N-Line prefetching can benefit both average-case and worst-case performance; however, the improvement on the worstcase execution time (WCET) is rather limited and inefficient. This paper presents two instruction prefetching approaches that are specially designed to enhance the worst-case performance, including the loop-based prefetching and WCET-oriented prefetching. Our experiments indicate that both instruction prefetching techniques can achieve better worst-case execution cycles than the Next-N-Line prefetching while having various impacts on the average-case performance.

Bounding Worst-Case Data Cache Performance by Using Stack Distance

  • Liu, Yu;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • 제3권4호
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    • pp.195-215
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    • 2009
  • Worst-case execution time (WCET) analysis is critical for hard real-time systems to ensure that different tasks can meet their respective deadlines. While significant progress has been made for WCET analysis of instruction caches, the data cache timing analysis, especially for set-associative data caches, is rather limited. This paper proposes an approach to safely and tightly bounding data cache performance by computing the worst-case stack distance of data cache accesses. Our approach can not only be applied to direct-mapped caches, but also be used for set-associative or even fully-associative caches without increasing the complexity of analysis. Moreover, the proposed approach can statically categorize worst-case data cache misses into cold, conflict, and capacity misses, which can provide useful insights for designers to enhance the worst-case data cache performance. Our evaluation shows that the proposed data cache timing analysis technique can safely and accurately estimate the worst-case data cache performance, and the overestimation as compared to the observed worst-case data cache misses is within 1% on average.

HR-WPAN을 위한 Worst-case Guaranteed Scheduling Algorithm (Worst-case Guaranteed Scheduling Algorithm for HR-WPAN)

  • 김제민;이정규
    • 한국통신학회논문지
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    • 제32권5B호
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    • pp.270-276
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    • 2007
  • 현재까지 HR-WPAN(High Rate-Wireless Personal Area Network)에 제안된 LDS(Link-status Dependent Scheduling) 알고리즘(algorithm)은 전체 네트워크(network)의 처리율(throughput) 향상만을 목적으로 함으로서, worst-link에 상대적으로 중요한 디바이스(device)가 연결된 경우, 그 디바이스의 처리율은 더욱 악화 된다. 본 논문에서 제안한 WGS(Worst-case Guaranteed Scheduling) 알고리즘은 link 상태가 변하더라도 모든 디바이스의 처리율을 동일하게 유지함으로써, worst-link에 연결된 디바이스의 처리율을 어느 정도 보장하고 전체 네트워크의 지연은 기존의 LDS 알고리즘보다 감소시킬 수 있다. 따라서 향후 HR-WPAN의 설계 시 worst-link에 연결된 디바이스의 처리율을 어느 정도 보장하고 전체 네트워크의 지연을 감소시키고 싶을 경우, 본 논문에서 제안한 WGS 알고리즘이 유용하게 사용될 수 있을 것이다.

Bounding Worst-Case Performance for Multi-Core Processors with Shared L2 Instruction Caches

  • Yan, Jun;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • 제5권1호
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    • pp.1-18
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    • 2011
  • As the first step toward real-time multi-core computing, this paper presents a novel approach to bounding the worst-case performance for threads running on multi-core processors with shared L2 instruction caches. The idea of our approach is to compute the worst-case instruction access interferences between different threads based on the program control flow information of each thread, which can be statically analyzed. Our experiments indicate that the proposed approach can reasonably estimate the worst-case shared L2 instruction cache misses by considering the inter-thread instruction conflicts. Also, the worst-case execution time (WCET) of applications running on multi-core processors estimated by our approach is much better than the estimation by simply assuming all L2 instruction accesses are misses.

An Interference Matrix Based Approach to Bounding Worst-Case Inter-Thread Cache Interferences and WCET for Multi-Core Processors

  • Yan, Jun;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • 제5권2호
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    • pp.131-140
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    • 2011
  • Different cores typically share the last-level cache in a multi-core processor. Threads running on different cores may interfere with each other. Therefore, the multi-core worst-case execution time (WCET) analyzer must be able to safely and accurately estimate the worst-case inter-thread cache interference. This is not supported by current WCET analysis techniques that manly focus on single thread analysis. This paper presents a novel approach to analyze the worst-case cache interference and bounding the WCET for threads running on multi-core processors with shared L2 instruction caches. We propose to use an interference matrix to model inter-thread interference, on which basis we can calculate the worst-case inter-thread cache interference. Our experiments indicate that the proposed approach can give a worst-case bound less than 1%, as in benchmark fib-call, and an average 16.4% overestimate for threads running on a dual-core processor with shared-L2 cache. Our approach dramatically improves the accuracy of WCET overestimatation by on average 20.0% compared to work.

HR-WPAN을 위한 Worst-case Guaranteed Scheduling algorithm (Worst-case Guaranteed Scheduling algorithm for HR-WPAN)

  • 김제민;이정규
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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    • pp.249-251
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    • 2007
  • The proposed LDS(Link-status Dependent Scheduling) algorithm in HR-WPAN up to now aims at doing only throughput elevation of the whole network, when the crucial DEV(Device) is connected with worst-link relatively, throughput of this DEV becomes aggravation, The proposed the WGS(Worst-case Guaranteed Scheduling) _algorithm in this paper guarantees throughput of the DEV which is connected with worst-link in a certain degree as maintaining throughput of all DEVs identically even if a link-status changes, decreases delay of the whole network more than current LDS algorithm Therefore proposed WGS algorithm in this paper will be useful in case of guaranteeing throughput of a DEV which is connected worst-link in a certain degree in a design of HR-WPAN hereafter.

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우주 환경에서의 Worst Case Analysis에 대한 소개와 응용 예 (Introduction and Application of Worst Case Analysis in Space Environment)

  • 이윤기;권기호;김대영;이상곤
    • 항공우주기술
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    • 제7권2호
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    • pp.58-66
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    • 2008
  • 우주 환경에서 동작하는 위성의 전자회로를 설계할 때는 지상에서 동작하는 상용 회로 설계와는 다른 고려 요소들이 존재한다. 그 이유는 첫째, 위성은 우주 방사능 등에 직접적으로 노출된 우주 환경에서 동작하기 때문이고, 둘째, 한번 궤도로 올라간 위성에 대해서 수리나 노화에 따른 교체가 불가능하기 때문이다. 이러한 상황에서 주어진 임무 기간 동안 아무런 문제없이 임무를 잘 수행하는 전자회로를 설계하기 위해서는 지상에서 동작하는 회로의 Worst Case Analysis보다 훨씬 엄격한 조건의 WCA를 적용해야 한다. 본 논문에서는 ESA에서 제시하는 WCA에 관한 규격서인 ECSS-Q-30-01A에서 WCA를 위해 고려해야할 입력요소들과 WCA 적용 방법을 정리하고, 실제로 저궤도 On-Board Computer에 구현된 간단한 회로를 가지고 WCA 적용 사례를 제시하고자 한다.

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