• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.5
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• pp.430-433
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• 2017

This paper presents a S/C/X-band LNA MMIC with resistive feedback structure in 0.25 um GaN HEMT process. The GaN devices have advantages as a high output power device having high breakdown voltage, energy band gap and stability at high temperature. Since the receiver using the GaN device with high linearity can be implemented without a limiter, the noise figure of the receiver can be improved and the size of receiver module can be reduced. The proposed GaN LNA MMIC based on 0.25 um GaN HEMT device is achieved the gain of > 15 dB, the noise figure of < 3 dB, the input return loss of > 13 dB, and the output return loss of > 8 dB in the S/C/X-band. The current consumption of GaN LNA MMIC is 70 mA with the drain voltage 20 V and the gate voltage -3 V.

• Journal of Advanced Navigation Technology
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• v.14 no.5
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• pp.684-690
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• 2010

Recently, the NG(Next Generation) system is studied for supporting convergence of various services and multi mode of single terminal. And a demand of user for taking the various services is getting increased, for supporting these services, many systems being able to transmit a large message have been appeared. In the NG system, it has to be supporting the CDMA and WCDMA besides the tele communication systems using OFDM method with single terminal An intergrated system can be improved with adopting of SoC technique. For adopting SoC technique on the intergrated terminal, we have to solve the non linear problem of HPA(High Power Amplifier). Nonlinear characteristic of HPA distorts both amplitude and phase of transmit signal, this distortion cause deep adjacent channel interference. We adopt a polynomial pre-distortion technique for this problem. In this paper, a noble modem design for NG mobile communication service and a method using polynomial pre-distorter with PAPR technique for counterbalancing nonlinear characteristic of the HPA are proposed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.2
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• pp.213-219
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• 2012

Recently, we are simultaneously exposed by various electromagnetic sources due to an increase of mobile communication services. However, EMF(Electric, Magnetic and Electromagnetic Field) study has been performed mainly about only single frequency. The objective of this paper is to develop an multiple-frequency exposure system for in vitro experiment. The exposure unit for in vitro experiments was designed by radial transmission line type to get broadband characteristics to generate signals of CDMA at 836.5 MHz and WCDMA at 1950 MHz frequency simultaneously. The modulated signals were delivered to the conical antenna through amplifier, digital attenuator and RF combiner. SAR values were obtained by the averaged values of 3 measured values at 9 points in petri dish using the fiber optic temperature probe. The measured return loss was under -15 dB. For 1 W input power, the mean value and standard deviation of SAR were $0.105{\pm}0.019$ for the CDMA frequency and $0.262{\pm}0.055$ for the WCDMA frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.12
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• pp.1350-1359
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• 2008

This paper presents a wideband doubly balanced resistive mixer fabricated using $0.5{\mu}m$ GaAs p-HEMT process. Three baluns are employed in the mixer. LO and RF baluns operating over an 8 to 20 GHz range were implemented with Marchand baluns. In order to reduce chip size, the Marchand baluns were realized by the meandering multicoupled line and inductor lines were inserted to compensate for the meandering effect. IF balun was implemented through a DC-coupled differential amplifier. The size of IF balun is $0.3{\times}0.5\;mm^2$ and the measured amplitude and phase unbalances were less than 1 dB and $5^{\circ}$, respectively from DC to 7 GHz. The mixer is $1.7{\times}1.8\;mm^2$ in size, has a conversion loss of 5 to 11 dB, and an output third order intercept(OIP3) of +10 to +15 dBm at 16 dBm LO power for the operating bandwidth.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.3
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• pp.46-55
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• 2016

This work proposes a 13b 100MS/s 45nm CMOS ADC with a high dynamic performance for IF-domain high-speed signal processing systems based on a four-step pipeline architecture to optimize operating specifications. The SHA employs a wideband high-speed sampling network properly to process high-frequency input signals exceeding a sampling frequency. The SHA and MDACs adopt a two-stage amplifier with a gain-boosting technique to obtain the required high DC gain and the wide signal-swing range, while the amplifier and bias circuits use the same unit-size devices repeatedly to minimize device mismatch. Furthermore, a separate analog power supply voltage for on-chip current and voltage references minimizes performance degradation caused by the undesired noise and interference from adjacent functional blocks during high-speed operation. The proposed ADC occupies an active die area of $0.70mm^2$, based on various process-insensitive layout techniques to minimize the physical process imperfection effects. The prototype ADC in a 45nm CMOS demonstrates a measured DNL and INL within 0.77LSB and 1.57LSB, with a maximum SNDR and SFDR of 64.2dB and 78.4dB at 100MS/s, respectively. The ADC is implemented with long-channel devices rather than minimum channel-length devices available in this CMOS technology to process a wide input range of $2.0V_{PP}$ for the required system and to obtain a high dynamic performance at IF-domain input signal bands. The ADC consumes 425.0mW with a single analog voltage of 2.5V and two digital voltages of 2.5V and 1.1V.