• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.5
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• pp.697-708
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• 2016

As the needs for fast wireless communication technology in various fields, including companies, individuals, etc., grows, many research projects related to the coverage of propagation are being carried out for plaining optimized communication services. On the other hand, there are some limitations in surveying and analyzing propagation in highland areas. To provide a better communication service of a new service, a range of radio environment conditions based on a wide radio bandwidth (selection of propagation model, correction of value in accordance with radio bandwidth, etc.) should be considered. In particular, radio environment conditions are becoming increasingly sophisticated. By the early detection of real-time changes in the radio spectrum, which is based on an examination and research of regional occupied band width condition, proper measures should be established. To make a proper solution of above, the basic real-time analysis of spectrum distribution status by regional groups is necessary. In addition, the establishment of prompt measures should be enable by stored or analyzed radio data. In an attempt to predict reliable propagation coverage, this thesis examines the limited propagation data with HTZ Warfare, which were collected from domestic high land sites faced with limited access. Furthermore, a comparative result value evaluation for an optimized propagation model was performed through testing simulations, and frequency-dependent and propagation model-dependent analysis.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.122-130
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• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.