• Title/Summary/Keyword: Wet-etching process

Search Result 215, Processing Time 0.028 seconds

Halogen-based Inductive Coupled Plasma에서의 W 식각시 첨가 가스의 효과에 관한 연구

  • 박상덕;이영준;염근영;김상갑;최희환;홍문표
    • Proceedings of the Korean Institute of Surface Engineering Conference
    • /
    • 2003.05a
    • /
    • pp.41-41
    • /
    • 2003
  • 텅스텐(W)은 높은 thermal stability 와 process compatibility 및 우수한 corrosion r resistance 둥으로 integrated circuit (IC)의 gate 및 interconnection 둥으로의 활용이 대두되고 있으며, 차세대 thin film transistor liquid crystal display (TFT-LCD)의 gate 및 interconnection m materials 둥으로 사용되고 았다. 그러나, 이러한 장점을 가지고 있는 팅스텐 박막이 실제 공정상에 적용되가 위해서는 건식 식각이 주로 사용되는데, 이는 wet chemical 을 이용한 습식 식각을 사용할 경우 낮은 etch rate, line width 의 감소 및 postetch residue 잔류 동의 문제가 발생하기 때문이다. 또한 W interconnection etching 을 하기 위해서는 높은 텅스텐 박막의 etch rate 과 하부 layer ( (amorphous silicon 또는 poly-SD와의 높은 etch selectivity 가 필수적 이 라 할 수 있다. 그러 나, 지금까지 연구되어온 결과에 따르면 텅스탠과 하부 layer 와의 etch selectivity 는 2 이하로 매우 낮게 관찰되고 았으며, 텅스텐의 etch rate 또한 150nm/min 이하로 낮은 값을 나타내고 있다. 따라서 본 연구에서는 halogen-based inductively coupled plasma 를 이용하여 텅스텐 박막 식각시 여러 가지 첨가 가스에 따른 높은 텅스탠 박막의 etch rate 과 하부 layer 와의 높은 etch s selectivity 를 얻고자 하였으며, 그에 따른 식각 메커니즘에 대하여 알아보고자 하였다. $CF_4/Cl_2$ gas chemistry 에 첨 가 가스로 $N_2$와 Ar을 첨 가할 경 우 텅 스텐 박막과 하부 layer 간의 etch selectivity 증가는 관찰되지 않았으며, 반면에 첨가 가스로 $O_2$를 사용할 경우, $O_2$의 첨가량이 증가함에 따라 etch s selectivity 는 계속적으로 증가렴을 관찰할 수 있었다. 이는 $O_2$ 첨가에 따라 형성되는 WOF4 에 의한 텅스텐의 etch rates 의 감소에 비하여, $Si0_2$ 등의 형성에 의한 poly-Si etch rates 이 더욱 크게 감소하였기 때문으로 사료된다. W 과 poly-Si 의 식각 특성을 이해하기 위하여 X -ray photoelectron spectroscopy (XPS)를 사용하였으며, 식각 전후의 etch depth 를 측정하기 위하여 stylus p pmfilometeT 를 이용하였다.

  • PDF

Effect of the Residual Impurity on the Prepreg Surface on the Wettability of Encapsulant for Chip on Board Package (칩 온 보드 패키지 적용을 위한 프리프레그 표면 잔류 불순물이 봉지재의 젖음성에 미치는 영향)

  • Gahui Kim;Doheon Kim;Kirak Son;Young-Bae Park
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.31 no.2
    • /
    • pp.9-15
    • /
    • 2024
  • The effect of the residual impurity on the prepreg surface on the wettability of encapsulant for chip on board package was analyzed with microstructure, compositions and chemical bonds using a scanning electron microscope and X-ray photoelectron spectroscopy. As a result, the contact angle of w/ residual impurity sample was measured to be 28° higher than that of w/o residual impurity sample, and the C-O bond was decreased to be 4% lower than that of w/o residual impurity sample. The surface energy of the prepreg decreased because the impurity ions, Na and F, generated by the manufacturing process and wet etching, reacted chemically with the C on the prepreg surface, forming C-F bonds and breaking the C-O bonds on the prepreg surface. Therefore, the wettability of the encapsulant was degraded because the contact angle between the encapsulant and the prepreg was increased.

Electrical Characteristic of IGZO Oxide TFTs with 3 Layer Gate Insulator

  • Lim, Sang Chul;Koo, Jae Bon;Park, Chan Woo;Jung, Soon-Won;Na, Bock Soon;Lee, Sang Seok;Cho, Kyoung Ik;Chu, Hye Yong
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2014.02a
    • /
    • pp.344-344
    • /
    • 2014
  • Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

  • PDF

Characteristics of InGaAs/GaAs/AlGaAs Double Barrier Quantum Well Infrared Photodetectors

  • Park, Min-Su;Kim, Ho-Seong;Yang, Hyeon-Deok;Song, Jin-Dong;Kim, Sang-Hyeok;Yun, Ye-Seul;Choe, Won-Jun
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2014.02a
    • /
    • pp.324-325
    • /
    • 2014
  • Quantum wells infrared photodetectors (QWIPs) have been used to detect infrared radiations through the principle based on the localized stated in quantum wells (QWs) [1]. The mature III-V compound semiconductor technology used to fabricate these devices results in much lower costs, larger array sizes, higher pixel operability, and better uniformity than those achievable with competing technologies such as HgCdTe. Especially, GaAs/AlGaAs QWIPs have been extensively used for large focal plane arrays (FPAs) of infrared imaging system. However, the research efforts for increasing sensitivity and operating temperature of the QWIPs still have pursued. The modification of heterostructures [2] and the various fabrications for preventing polarization selection rule [3] were suggested. In order to enhance optical performances of the QWIPs, double barrier quantum well (DBQW) structures will be introduced as the absorption layers for the suggested QWIPs. The DBWQ structure is an adequate solution for photodetectors working in the mid-wavelength infrared (MWIR) region and broadens the responsivity spectrum [4]. In this study, InGaAs/GaAs/AlGaAs double barrier quantum well infrared photodetectors (DB-QWIPs) are successfully fabricated and characterized. The heterostructures of the InGaAs/GaAs/AlGaAs DB-QWIPs are grown by molecular beam epitaxy (MBE) system. Photoluminescence (PL) spectroscopy is used to examine the heterostructures of the InGaAs/GaAs/AlGaAs DB-QWIP. The mesa-type DB-QWIPs (Area : $2mm{\times}2mm$) are fabricated by conventional optical lithography and wet etching process and Ni/Ge/Au ohmic contacts were evaporated onto the top and bottom layers. The dark current are measured at different temperatures and the temperature and applied bias dependence of the intersubband photocurrents are studied by using Fourier transform infrared spectrometer (FTIR) system equipped with cryostat. The photovoltaic behavior of the DB-QWIPs can be observed up to 120 K due to the generated built-in electric field caused from the asymmetric heterostructures of the DB-QWIPs. The fabricated DB-QWIPs exhibit spectral photoresponses at wavelengths range from 3 to $7{\mu}m$. Grating structure formed on the window surface of the DB-QWIP will induce the enhancement of optical responses.

  • PDF

Optimization of Cookie Preparation by Addition of Yam Powder (마분말 첨가 쿠키 제조조건 최적화)

  • Joo, Na-Mi;Lee, Sun-Mee;Jung, Hee-Sun;Park, Sang-Hyun;Song, Yun-Hee;Shin, Ji-Hun;Jung, Hyeon-A
    • Food Science and Preservation
    • /
    • v.15 no.1
    • /
    • pp.49-57
    • /
    • 2008
  • This study was conducted to develop an optimal composite recipe for a cookie including yam powder that would be attractive to all age groups. Wheat flour was partially substituted by yam powder to reduce the content of wheat flour. This study has produced the sensory optimal composite recipe by making cookies, respectively with each 5 level of yam powder $(X_1)$, Sugar$(X_2)$, butter$(X_3)$, by C.C.D (Central Composite Design) and conducting sensory evaluation and instrumental analysis by means of RSM (Response Surface Methodology). Sensory items showed very significant values in color, softness, overall quality (p<0.01), flavor (p<0.05) and those of instrumental analysis showed significant values in lightness, redness (p<0.05), spread ratio, hardness (p<0.01). Also sensory optimal ratio of yam cookie was calculated at yam powder 37.35 g, sugar 50.75 g, butter 78.40 g and it was revealed that the factors of influencing yam cookie aptitude were in older of yam powder, butter, sugar.