• 제목/요약/키워드: Wafer direct bonding

검색결과 110건 처리시간 0.042초

극한 환경 MEMS용 3C-SiC기판의 직접접합 (Direct Bonding of 3C-SiC Wafer for MEMS in Hash Environments)

  • 정연식;이종춘;정귀상
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 하계학술대회 논문집 C
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    • pp.2020-2022
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    • 2002
  • SiC direct bonding technology is very attractive for both SiCOI(SiC-on-insulator) electric devices and SiC-MEMS fileds because of its application possibility in harsh environements. This paper presents on pre-bonding according to HF pre-treatment conditions in SiC wafer direct bonding using PECVD oxide. The PECVD oxide was characterized by XPS and AFM, respectively. The characteristics of bonded sample were measured under different bonding conditions of HF concentration and applied pressure, respectively. The bonding strength was evaluated by tensile strength method. Components existed in the interlayer were analyzed by using FT-IR. The bond strength depends on the HF pre-treatment condition before pre-bonding (Min : 5.3 kgf/$cm^2{\sim}$ Max : 15.5 kgf/$cm^2$).

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MEMS-based 마이크로 터보기계의 개발 (Development of MEMS-based Micro Turbomachinery)

  • 박건중;민홍석;전병선;송성진;주영창;민경덕;유승문
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2001년도 춘계학술대회논문집E
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    • pp.169-174
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    • 2001
  • This paper reports on the development of high aspect ratio structure and 3-D integrated process for MEMS-based micro gas turbines. To manufacture high aspect ratio structures, Deep Reactive Ion Etching (DRIE) process have been developed and optimized. Specially, in this study, structures with aspect ratios greater than 10 were fabricated. Also, wafer direct bonding and Infra-Red (IR) camera bonding inspection systems have been developed. Moreover, using glass/silicon wafer direct bonding, we optimized the 3-D integrated process.

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큰 초기접합력을 갖는 Si기판 직접접합에 관한 연구 (A Study on Si-wafer direct bonding for high pre-bonding strength)

  • 정연식;김재민;류지구;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.447-450
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    • 2001
  • Abstract-Si direct bonding(SDB) technology is very attractive for both Si-on-insulator(SOI) electric devices and MEMS applications because of its stress free structure and stability. This paper presents on pre-bonding according to HF pre-treatment conditions in Si wafer direct bonding. The characteristics of bonded sample were measured under different bonding conditions of HF concentration, and applied pressure. The bonding strength was evaluated by tensile strength method. The bonded interface and the void were analyzed by using SEM and IR camera, respectively. Components existed in the interlayer were analysed by using FT-lR. The bond strength depends on the HF pre-treatment condition before pre-bonding (Min : 2.4kgf/cm$^2$∼Max : 14.9kgf/cm$^2$).

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실리콘 웨이퍼 직접 접합에서 기포형 접합 결합에 관한 연구 (A study on Bubble-like Defects in Silicon Wafer Direct Bonding)

  • 문도민;홍진균;유학도;정해도
    • 한국재료학회지
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    • 제11권3호
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    • pp.159-163
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    • 2001
  • 실리콘 웨이퍼 직접 접합을 성공하기 위해서는 양호한 접합면을 구성하여야 하며, 이를 위해 접합면에서 발생하는 주요 결함 중 하나인 기포형 접합 결함을 억제하여야 한다. 본 연구에서는 접합면에서 발생하는 기포형 결함의 상온 접합 및 열처리 과정에서의 거동을 관찰하여 내부의 압력이 증가함을 직접 관찰할 수 있었다. 또한, 대기압 하의 열처리에서 결함이 발생하지 않는 $SiO_2$-$SiO_2$ 접합 웨이퍼가 진공에서의 열처리에서 결함이 발생하는 현상을 통해 기포형 결함의 내부 압력과 성장과의 관계를 실험을 통하여 증명할 수 있었다.

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실리콘 직접 본딩에 의한 P-N 접합의 특성에 관한 연구 (A Study on Characterization of P-N Junction Using Silicon Direct Bonding)

  • 정원채
    • 한국전기전자재료학회논문지
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    • 제30권10호
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    • pp.615-624
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    • 2017
  • This study investigated the various physical and electrical effects of silicon direct bonding. Direct bonding means the joining of two wafers together without an intermediate layer. If the surfaces are flat, and made clean and smooth using HF treatment to remove the native oxide layer, they can stick together when brought into contact and form a weak bond depending on the physical forces at room temperature. An IR camera and acoustic systems were used to analyze the voids and bonding conditions in an interface layer during bonding experiments. The I-V and C-V characteristics are also reported herein. The capacitance values for a range of frequencies were measured using a LCR meter. Direct wafer bonding of silicon is a simple method to fuse two wafers together; however, it is difficult to achieve perfect bonding of the two wafers. The direct bonding technology can be used for MEMS and other applications in three-dimensional integrated circuits and special devices.

HF 전처리시 Si기판 직접접합의 초기접합에 관한 연구 (A study on pre-bonding of Si wafer direct bonding at HF pre-treatment)

  • 정귀상;강경두
    • 센서학회지
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    • 제9권2호
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    • pp.134-140
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    • 2000
  • Si기판 직접접합기술은 전자소자 및 MEMS에의 응용에 있어 대단히 매력적인 기술이다. 본 논문에서는 Si기판 직접접합에 있어서 HF 전처리 조건에 따른 초기접합에 관하여 서술한다. 접합된 시료들의 특성은 HF 농도, 인가하중과 같이 각각의 접합조건하에서 분석하였으며, 접합력은 인장강도측정법에 의해 평가하였다. 계면상의 결합성분과 표면의 거칠기는 FT-IR과 AFM을 사용하여 평가하였다. HF 전처리 후 Si기판 표면상의 Si-F결합은 DI water에 세정하는 동안 Si-OH로 재배열되며, 결과적으로 hydrophobic 기판은 Si-OH$\cdots$(HOH$\cdots$HOH$\cdots$HOH)$\cdots$OH-S의 수소결합되어 hydrophilic화된다. 초기접합력은 초기접합전의 HF 전처리 조건에 의존한다. (최소 : $2.4kgf/cm^2{\sim}$최대 : $14.9kgf/cm^2$)

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A Magneto-Optic Waveguide Isolator Using Multimode Interference Effect

  • Yang, J.S.;Roh, J.W.;Lee, W.Y.;Ok, S.H.;Woo, D.H.;Byun, Y.T.;Jhon, Y.M.;Mizumoto T.;Lee,S.
    • Journal of Magnetics
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    • 제10권2호
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    • pp.41-43
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    • 2005
  • We have investigated an optical waveguide isolator with a multimode interference section by wafer direct bonding, operating at a wavelength $1.55\;{\mu}m$. In order to fabricate the device for monolithic integration, the wafer direct bonding between a magnetic garnet material as a cladding layer and a semiconductor guiding layer has been achieved. We found that wafer direct bonding between InP and GGG $(Gd_3Ga_5O_{12})$ is effective for the integration of a waveguide optical isolator. The isolation ratio was obtained to be 2.9 dB in the device.

Integration of an Optical Waveguide Isolator by Wafer Direct Bonding

  • Roh J. W.;Yang J. S.;Ok S. H.;Choi U. K.;Lee S.;Lee W. Y.
    • 한국자기학회:학술대회 개요집
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    • 한국자기학회 2004년도 동계학술연구발표회 논문개요집
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    • pp.175-176
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    • 2004
  • An integrated waveguide optical isolator by wafer direct bonding has been studied. The isolation ratio was found to be 2.9dB in our device. We found that wafer direct bonding between the InP and GGG is effective for the integration of a waveguide optical isolator.

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결정의존성 식각/기판접합을 이용한 MEMS용 구조물의 제작 (Si Micromachining for MEMS-lR Sensor Application)

  • 박흥우;주병권;박윤권;박정호;김철주;염상섭;서상의;오명환
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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    • pp.411-414
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    • 1998
  • In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PT layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PT layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PT layer of c-axial orientation rained thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PT layer were measured, too.

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직접접합 실리콘/실리콘질화막//실리콘산화막/실리콘 기판쌍의 선형가열에 의한 보이드 결함 제거 (Eliminating Voids in Direct Bonded Si/Si3N4‖SiO2/Si Wafer Pairs Using a Fast Linear Annealing)

  • 정영순;송오성;김득중;주영철
    • 한국재료학회지
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    • 제14권5호
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    • pp.315-321
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    • 2004
  • The void evolution in direct bonding process of $Si/Si_3$$N_4$$SiO_2$/Si silicon wafer pairs has been investigated with an infrared camera. The voids that formed in the premating process grew in the conventional furnace annealing process at a temperature of $600^{\circ}C$. The voids are never shrunken even with the additional annealing process at the higher temperatures. We observed that the voids became smaller and disappeared with sequential scanning by our newly proposed fast linear annealing(FLA). FLA irradiates the focused line-shape halogen light on the surface while wafer moves from one edge to the other. We also propose the void shrinking mechanism in FLA with the finite differential method (FDM). Our results imply that we may eliminate the voids and enhance the yield for the direct bonding of wafer pairs by employing FLA.