• 한국통신학회:학술대회논문집
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• 한국통신학회 1986년도 춘계학술발표회 논문집
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• pp.206-210
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• 1986

Double Ion Implantation methods are used to improve the stiffness os carrier profiles, and then the analytical solutions to Poisson`s equation are derived with summation of each carrier profile. Numerical analyses are done using profer boudary conditions and the results show that the improvement of voltage-dependent-capacitance ratio (C(!)/C(25)) is obtained up to B.6. The third ion implantation is for the enhancement of the Schottky barrier height.

• 한국전기전자재료학회논문지
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• 제21권4호
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• pp.305-310
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• 2008

Deep trench etching of silicon was investigated as a function of RF source power, DC bias voltage, $C_4F_8$ gas flow rate, and $O_2$ gas addition. On increasing the RF source power from 300 W to 700 W, the etch rate was increased from $3.52{\mu}m/min$ to $7.07{\mu}m/min$. The addition of $O_2$ gas improved the etch rate and the selectivity. The highest etch rate is achieved at the $O_2$ gas addition of 12 %, The selectivity to PR was 65.75 with $O_2$ gas addition of 24 %. At DC bias voltage of -40 V and $C_4F_8$ gas flow rate of 30 seem, We were able to achieve etch rate as high as $5.25{\mu}m/min$ with good etch profile.

• 조명전기설비학회논문지
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• 제13권3호
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• pp.48-55
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• 1999

본 연구에서는 방사상 배전계통에 있어서 손실감소 및 전압보상을 위한 커패시터 최적배치 및 운용 방안을 제시하였다. 커패시터 배치와 관련된 비용함수를 실제 뱅크단위로 이산성을 고려하여 계단함수로 정식화하였다. 불연속이면서 미분 불가능한 함수인 커패시터 배치와 관련된 비용함수의 해를 효율적으로 구하기 위하여 전역적탐색기법인 GA를 이요하였다. 특히, GA의 스트링을 커패시터가 배치될 모선의 인덱스와 투입량인 뱅크단위로 동시에 구성하여 기존의 방법보다 효율적으로 해를 탐색하였다. 또한 스트링의 길이를 변화시킬 수 있는 길이 돌연변이(length mutation) 연산자를 사용하므로써 효과적으로 커패시터 설치위치의 수를 결정할 수 있었다. 제안한 커패시터 설치위치와 투입량을 동싱에 탐색할 수 있는 방안으로부터 커패시터의 최소 투입량으로 다양한 부하레벨에서 전력손실을 감소시키고, 전압강하를 적절히 보강시킬수 있다. 이에 대한 효용성을 입증하기 위하여 22kV-9-section feeler로 구성된 방사상 배전계통에 적용하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.223-226
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• 2003

We propose an improvement method for a $\underline{G}ate$ $\underline{OX}ide(GOX)$ thinning at the edge of $\underline{S}hallow$ $\underline{T}rench$ $\underline{I}solation(STI)$, when STI is adopted to Dual Gate Oxide(DGOX) Process. In the case of SOC(System On-a-Chip), the DGOX process is usually used for realizing both a low and a high voltage parts in one chip. However, it is found that the severe GOX thinning occurs from at STI top edge region and a dent profile exists at the top edge of STI, when conventional DGOX and STI process carried out in high density device chip. In order to overcome this problem, a new DGOX process is tried in this study. And we are able to prevent the GOX thinning by H2 anneal, partially SiN liner skip, and a method which is merged a thick sidewall oxide(S/O) with a SiN pull-back process. Therefore, a good subthreshold characteristics without a double hump is obtained by the prevention of a GOX thinning and a deep dent profile.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2616-2619
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• 1999

The Backlight inverter used in the laptop computer is designed in this study. It has been difficult for electromagnetic transformer to enhance the efficiency and compact profile. In this study, (l) the piezoelectric transformer(PT) is used for reducing the loss: (2) the volume of core and winding coil are used in electromagnetic transformer, and (3) the zero voltage switching(ZVS) is used in the driver of the resonant circuit. The modified PT for this paper and the equivalent circuit are supported by the simulation program. ZVS is achieved by Half-Bridge inverter circuit. The result of the experiment shows more than 91% improvement in terms of the efficiency.

• Transactions on Electrical and Electronic Materials
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• 제18권6호
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• pp.345-349
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• 2017

Reconfiguration is an important method to minimize power loss and load interruption by creating an optimal configuration of a system. Furthermore, by increasing demand and value of consumption, construction of new power plants can be postponed in networks by reconfiguration and proper arrangement of linkage switches. This method is feasible for radial networks, which create meshes of linkage switches. One convenient way to achieve a system with minimal power loss and interruption is to utilize capacitors. Optimal placement and sizing of capacitors in such applications is an important issue in the literature. In this paper, cat swarm optimization is introduced as a new metaheuristic algorithm to achieve this purpose. Simulation has been carried out in two feasible networks, 69-bus and 33-bus systems.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.45-51
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• 2014

Distribution system is a critical link between customer and utility. The control of power loss is the main factor which decides the performance of the distribution system. There are two methods such as (i) distribution system reconfiguration and (ii) inclusion of capacitor banks, used for controlling the real power loss. Considering the improvement in voltage profile with the power loss reduction, later method produces better performance than former method. This paper presents an advanced evolutionary algorithm for capacitor inclusion for loss reduction. The conventional sensitivity analysis is used to find the optimal location for the capacitors. In order to achieve a better approximation for the current candidate solution, Opposition based Differential Evolution (ODE) is introduced. The effectiveness of the proposed technique is validated through 10, 33, 34 and85-bus radial distribution systems.

• 대한기계학회논문집 C: 기술과 교육
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• 제3권3호
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• pp.175-181
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• 2015

전투차량의 내부는 혹서기에는 약 $80^{\circ}C$에 이를 만큼 고온 다습한 환경에 노출되어 감지거리를 측정하여 제어기에 신호를 전달하는 근접센서가 감지거리가 늘어나면서 결국에는 센서 자체의 금속물질을 인식하여 작동이 안되는 고장이 다발하여 원인분석 및 개선을 수행하게 되었다. 개선은 2차에 걸쳐 수행되었고 많은 시행착오를 거쳐 고온에 장기적으로 노출될 경우 고장이 발생된다는 것을 알아내어 개선방안을 도출한 결과, 이미터코일(Emitter Coil)을 한 개 더 추가하여 전압차이를 높여 감지 정확도를 향상시키고, 내부 몰딩 면적을 높여 진동 및 충격 내성을 강화하여 온도 및 습도 변화에 둔감하도록 설계개선을 하였다. 입증을 위해 고온 다습($85^{\circ}C$, 85%습도)한 환경챔버에서 136시간 내구시험을 실시하여 고장 발생이 없음을 확인하였다.

• 한국전기전자재료학회논문지
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• 제26권4호
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• pp.284-288
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• 2013

Power MOSFETs(Metal Oxide Semiconductor Field Effect Transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. We have experimental results and explanations on the doping profile dependence of the electrical behavior of the vertical MOSFET. The device is fabricated as $8.25{\mu}m$ cell pitch and $4.25{\mu}m$ gate width. The performances of device with various p base doping concentration are compared at Vth from 1.77 V to 4.13 V. Also the effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for various applications can be further optimized at power device.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 추계학술대회 논문집 학회본부 A
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• pp.180-183
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• 2000

The Battery Energy Storage System(BESS) has lots of advantages such as load levelling, quick response emergency power(spinning reserve), frequency and voltage control, improvement of reliability, and deferred generation and transmission construction. The economic feasibility requires justification from the customer side of meter to promoting the dissemination of BESS nationally. In this paper, we proposed the economic assessment model of customer owned Battery Energy Storage System(BESS) which is complemented and improved the existing model. The proposed model is applied to the typical customer type(light-industrial commercial, and residential) which are taken from the statistical analysis on the load profile survey of Korea Electric Power COmpany (KEPCO). The economic assessment performed for each customer type to justifying their economic feasibility of BESS installation from the economic measures such as payback period, overall benefits, ROI, and ROR. The results of this paper are useful to the customer investment decision making and the national energy policy & strategy.