• Title/Summary/Keyword: Viterbi Decoder

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Design and Implementation of 4D-8PSK TCM Simulator for Satellite Communication Systems (4D-8PSK TCM 위성통신 시스템 시뮬레이터 설계 및 구현)

  • Kim, Dohwook;Kim, Joongpyo;Kim, Sanggoo;Yoon, Dongweon
    • The Journal of Korean Institute of Information Technology
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    • v.17 no.3
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    • pp.31-41
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    • 2019
  • In this paper, we design and implement the simulator for the transmitter and receiver of 4D-8PSK TCM with 2.0, 2.25, 2.5, and 2.75 bits/symbol-channel transmission efficiency recommended by the CCSDS for satellite communications, and then analyze the BER performance of 4D-8PSK TCM system in AWGN channel. The transmitter of 4D-8PSK TCM is designed in accordance with the recommendation in the CCSDS standard. Meanwhile, for the receiver design of 4D-8PSK TCM, we design the differential decoder generalizing the differential encoder/decoder scheme. The trellis decoding algorithm is designed by applying the auxiliary trellis information and the Viterbi algorithm, and an 8-dimensional constellation mapper equation given in the CCSDS standard is deconstructed to design constellation mapper. Especially, we present the optimized receiver for 4D-8PSK TCM system by investigating the BER performances for the traceback lengths in the Viterbi decoder through computer simulations..

A Two-Step Soft Output Viterbi Algorithm with Algebraic Structure (대수적 구조를 가진 2단 연판정 출력 비터비 알고리듬)

  • 김우태;배상재;주언경
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12A
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    • pp.1983-1989
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    • 2001
  • A new two-step soft output Viterbi algorithm (SOVA) for turbo decoder is proposed and analyzed in 7his paper. Due to the algebraic structure of the proposed algorithm, slate and branch metrics can be obtained wish parallel processing using matrix arithmetic. As a result, the number of multiplications to calculate state metrics of each stage and total memory size can be decreased tremendously. Therefore, it can be expected that the proposed algebraic two-step SOVA is suitable for applications in which low computational complexity and memory size are essential.

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SOQPSK-TG Receiver Using Trellis State Combining (트렐리스 상태 결합을 이용한 SOQPSK-TG 수신기)

  • Gu, Young Mo;Boo, Jungil;Kim, Bokki
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.47 no.3
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    • pp.240-244
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    • 2019
  • SOQPSK-TG which consists of differential precoder and CPM modulator was adopted as telemetry standard because of its high power and bandwidth efficiency. We proposed four-state Viterbi decoder for SOQPSK-TG. Reducing the trellis state to four was possible by simplifying frequency pulse of SOQPSK-TG to square pulse of symbol length 2 and combing this with differential precoder. Compared with conventional SOQPSK-TG receivers, computer simulation result shows about 1 dB performance improvement was achieved at BER of $10^{-5}$ in AWGN channel.

A burst-error-correcting decoding scheme of multiple trellis-coded $\pi$/4 shift QPSK for mobile communication channels (이동 통신 채널에서 다중 트렐리스 부호화된 $\pi$/4 shift QPSK의 연집 에러 정정 복호 방식)

  • 이정규;송왕철;홍대식;강창언
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.4
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    • pp.24-31
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    • 1995
  • In this paper, the dual-mode burst-error-correcting decoding algorithm is adapted to the multiple trellis-coded .pi./4 shift QPSK in order to achieve the improvement of bit error rate (BER) performance over fading channels. The dual-mode adaptive decoder which combines maximum likelihood decoding with a burst detection scheme usually operates as a Viterbi decoder and switches to time diversity error recovery whenever an uncorrectable error pattern is identified. Rayleigh fading channels and Rician fading channels having the Rician parameter K=5dB are used in computer simulation, and the simulation results are compared with those of interleaving techniques. It is shown that under the constraint of the fixed overall memory quantity, the dual-mode adaptive decoding scheme gains an advantage in the BER performance with respect to interleaving strategies.

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Efficient ACS Design for High Speed Viterbi Decoder (고속 비터비 디코더를 위한 효율적인 ACS 설계)

  • Lee, Seul-Ki;Kim, In-Soo;Min, Hyoung-Bok;Ryu, Joong-Kyung
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.2273-2274
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    • 2008
  • It respects the high speed of the Bitter expense decoder from the present paper ACS (Add Compare Select) block structures of new method it proposed. It became component anger of existing and it substituted it added all input price it predicted with the method which reduces the operation which is unnecessary it chose respectively ACS unit and a union logical operation circuit and the result after operation one in advance.

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The performance of neural convolutional decoders on the satellite channels with nonlinear distortion (비선형 왜곡을 가진 위성 채널상에서 신경회로망 콘볼루션 복호기(NCD)의 성능)

  • 유철우;강창언;홍대식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.8
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    • pp.2109-2118
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    • 1996
  • The neural convolutional decoder(NCD) was proposed as a method of decoding convolutional codes. In this paper, simulation results are presented for coherent BPSK in memoryless AWGN channels and coherent QPSK in the satellite channels. The NCD can learn the nonlinear distortion caused by the charactersitics of the satellite channel including the filtering effects and the nonlinear effects of the travling wave tube amplifier(TWTA). Thus, as compared with the AWGN channel, the performance difference in the satellite channel between the NCD for the systematic code and the Viterbi decoder for the nonsystematic code is reduced.

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High performance Viterbi decoder using Modified Register Exchange methods (Modified Register Exchange 방식을 이용한 고성능 비터비 디코더 설계)

  • 한재선;이찬호
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.803-806
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    • 2003
  • 본 논문에서는 traceback 동작 없이 decoding이 가능한 Modified Register Exchange 방식을 이용하여 이를 block decoding에 적용하는 비터비 decoding 방식을 제안하였다. Modified Register Exchange 방식을 block decoding에 적용함으로써 decision bit 들을 결정하기 위해 필요한 동작 사이클을 줄였고, block decoding을 사용하는 기존의 비터비 디코더보다 더 적은 latency 가지게 되었다. 뿐만 아니라, 메모리를 더 효율적으로 사용할 수 있으면서 하드웨어의 구현에 있어서도 복잡도가 더 감소하게 된다. 제안된 방식은 같은 하드웨어 복잡도로도 메모리의 감소 또는 latency 의 감소에 중점을 둔 설계가 가능하다.

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Adaptive PRML Core Development for Optical Disk Playback (광 디스크 재생을 위한 적응형 PRML 코어 개발에 관한 연구)

  • 박현수;김민철;김기현;심재성;서중언;이정현
    • Proceedings of the IEEK Conference
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    • 2002.06e
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    • pp.39-42
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    • 2002
  • A new adaptive PRML architecture, considered not only DVD-ROM but also DVD-Multi including DVD-RAM as well, is presented to demonstrate its superiority over the conventional analog channel in a DVD system. For this new architecture, channel adaptation algorithm using gain controlled type of FIR filter, and asymmetry compensation algorithm using expected level adaptation of viterbi decoder are presented. In addition, a method of modelling the disk tilt and asymmetrical read-back signal are discussed.

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