• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.7
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• pp.251-257
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• 2014

The Viterbi algorithm(VA) is used to estimate the state transition of discrete-time finite state machine(FSM) that is in an uncorrelated noisy environment. This paper modified the Hamming Network to estimate the state transitions in the finite state machines, and proposed state-parallel and block-parallel Viterbi decoder. The modified Hamming Network(mHN) can perform the decoding of convolutional codes correctly as conventional Viterbi decoder. Furthermore, the complexities of the proposed Viterbi decoder are reduced approximately 10% less than conventional Viterbi decoder, and the processing times are improved approximately 40% more than conventional Viterbi decoder.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.59-64
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• 2007

In this paper, we propose a new decoding method for differentially biorthogonal chirp spread spectrum (DBO-CSS). In DBO-CSS, the information is carried on the differential phase not between the adjacent sub-chirp symbols but between the sub-chirp symbols in the same position of adjacent full-chirp symbol. So, the conventional multiple symbol differential detection (MSDD) algorithms to enhance the BER performance can not be applied to the DBO-CSS directly. In this paper, we propose a new differential detection algorithm based on a partial MSD(multiple symbol detection) and a viterbi algorithm. It is shown that the performance gain of the proposed algorithm when compared with that of the conventional detection algorithm is around 2.5dB at BER = 10-5.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6C
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• pp.601-609
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• 2002

The efficient Viterbi decoder that supports full data-rate output of DAB system was proposed. Viterbi decoder consumes lots of computational load and should be designed to be fast specific hardware. In this paper, SST scheme was adopted for Viterbi decoder with puncturing to reduced the power consumption. Puncturing vector tables are modified and re-arranged to be designed by a hardwired logic to save the system area. New re-scaling scheme which uses the fact that the difference of the maximum and minimum of the path metric values is bounded is proposed. The proposed re-scaling scheme optimizes the wordlength of path metric memory and greatly reduces the computational load for re-scaling by controlling MSB of path metric memory. Another saving of computation is done by proposed algorithm for branch metric calculation, which makes use of pre-calculated metric values. The designed Viterbi decoder was synthesized using SAMSUNG 0.35$\mu$ standard cell library and occupied small area and showed lower power consumption.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.45-52
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• 2004

This Paper presents a modified hard decision Viterbi decoder with an error prediction circuit enhancing performance for the burst error inputs. Viterbi decoder employs the maximum likelihood decoding algorithm which shows excellent error correction capability for the random error inputs. Viterbi decoders, however, suffer poor error correction performance for the burst error inputs under the fading channel. The proposed error prediction algorithm increases error correction capability for the burst errors. The algorithm estimaties the burst error data area using the maximum path metric for the erroneous inputs, It calculates burst error intervals based on increases in the maximum values of a path metric. The proposed decoder keeps a performance the same as the conventional decoders on AWGN channels for the IEEE802.l1a WLAN system. It shows performance inproving 15% on the burst error of multi-path fading channels, widely used in mobile systems.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.6 s.360
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• pp.1-8
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• 2007

In wireless sensor network which uses limited battery, power consumption is very important factor for the survivality of the system. By using low-power communication to reduce power consumption, error rate is increased in typical conditions. This paper analyzes power consumption of specific error control coding (ECC) implementations. With identical link quality, ECC provides coding gain which save the power for transmission at the cost of computing power. In sensor node, transmit power is higher than computing power of Micro Controller Unit (MCU). In this paper, Viterbi algerian is applied to the low-transmit-power sensor networks in terms of network power consumption. Practically, Viterbi algorithm presents 20% of reduction of re-transmission in compared with Auto Repeat Request (ARQ) system. Furthermore, it is observed that network power consumption is decreased by almost 18%.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.3157-3159
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• 2000

Soft Output Viterbi Algorithm is modification of Viterbi algorithm to deliver not only the decoded codewords but also a posteriori probability for each bit. This paper presents SOVA decoder which can be used for component decoder of turbo decoder. We used two-step SMU architectures combined with systolic array traceback methods to reduce the complexity of the design. We followed the specification of CDMA2000 system for SOVA decoder design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.712-720
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• 1994

In digital mobile communication systems, the convolutional coding is considered as the optimum error correcting scheme. Recently, the Viterbi algorithm is widely used for the decoding of convolutional code. Most Viterbi decoder has been proposed in conde rate R=1/2 or 2/3 with memory components (m) less than 3. which degrades the error correcting capability because of small code constraints (K). We consider the design method for typical code rate R=1/2, K=7(171,133) convolutional code with memory components, m=6. In this paper, a novel construction method is presented which combines maximum likelihood decoding with a state transition double detection and comparison method. And the designed circuit has the error-correcting capability of random 2 bit error. As the results of logic simulation, it is shown that the proposed Viterbi decoder exactly corrects 1 bit and 2 bit error signal.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.12A
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• pp.1333-1339
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• 2004

In IS-95 and IMT-2000 systems using variable code rates and constraint lengths, this paper limits code rate 1/2 and constraint length 3 and states the effective reduction of PM(Path Metric) and BM(Branch Metric) memories and arithmetic comparative calculations with appling PVSL(Prototype Vector Selecting Logic) and LVQ(Learning Vector Quantization) in neural network to simplify systems and to decode forwardly. Regardless of extension of constraint length, this paper presents the new Vierbi decoder and the appied algorithm because new structure and algorithm can apply to the existing Viterbi decoder using only uncomplicated application and verifies the rationality of the proposed Viterbi decoder through VHDL simulation and compares the performance between the proposed Viterbi decoder and the existing.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.2
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• pp.37-44
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• 2002

In this paper, the Viterbi decoder containing new branch metrics of the squared Euclidean distance with multiple order phase differences is introduced in order to improve the bit error rate (BER) in the differential detection of the trellis-coded MDPSK-DFDM. The proposed Viterbi decoder is conceptually same as the sliding multiple phase differential detection method that uses the branch metric with multiple phase differences. Also, we describe the Viterbi algorithm in order to use this branch metrics. Our study shows that such a Viterbi decoder improves BER peformance without sacrificing bandwidth and power efficiency. Also, the proposed algorithm can be used in the single carrier modulation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.568-573
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• 2002

In this paper, the Viterbi decoder containing new branch metrics of the squared Euclidean distance with multiple order phase differences is introduced in order to improve the bit error rate (BER) in the differential detection of the trellis-coded MDPSK-OFDM. The proposed Viterbi decoder is conceptually same as the Continuous multiple phase differential detection method that uses the branch metric with multiple phase differences. Also, we describe the Viterbi algorithm in order to use this branch metrics. Our study shows that such a Viterbi decoder improves BER performance without sacrificing bandwidth and power efficiency Also. the proposed algorithm ran be used in the single carrier modulation.