• Journal of KIISE:Software and Applications
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• v.34 no.9
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• pp.828-847
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• 2007

In this paper we propose a formal data model of an object-based thesaurus system supporting multi-dimensional facets. According to facets reflecting on respective user perspectives, it supports systematic construction, browsing, navigating and referencing of thesauri. Unlike other faceted thesaurus systems, it systematically manages its complexity by appropriately ing sophisticated conceptual structure through visualized browsing and navigation as well as construction. The browsing and navigation is performed by dynamically generating multi-dimensional virtual thesaurus hierarchies called "faceted thesaurus hierarchies." The hierarchies are automatically constructed by combining facets, each representing a dimension of view. Such automatic construction may make it possible the flexible extension of thesauri for they can be easily upgraded by pure insertion or deletion of facets. With a well defined set of self-referential queries, the thesauri can also be effectively referenced from multiple view points since they are structured by appropriately interpreting the semantics of instances based on facets. In this paper, we first formalize the underlying model and then implement its prototype to demonstrate its feasibility.

• Proceedings of the Korean Institute Of Construction Engineering and Management
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• 2004.11a
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• pp.349-352
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• 2004

4D system has applied to construction project as a management tool after the late 1990's. Various 4D systems have been developed, however they have some problems that should be improved. Especially, the 4D system for civil engineering project needs synthesized 3D model between natural ground condition and physical facility type. It is a different problem comparing with the system for building project. 1'his study suggests an automatically synthesizing methodology between ground triangulate network and design triangulate network. Furthermore the study develops an application methodology of multi-texturing technique defined in virtual reality modeling language (VRML) for skipping the 3D model synthesizing process from the 4D model development processes. The suggested methodology is applied to the prototype of real 4D system. The proposed technique for 3D modeling may be used as an essential methodology for developing 4D system for civil engineering projects.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.2
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• pp.177-182
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• 2010

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In the developing process of a hardware component in system, the design phase has been regarded as a phase consuming lots of time and cost. However, the verification phase in which functionality of the designed component is verified has recently been considered as a much important phase. In this paper, the implementation of a verification environment which is based on SystemC infrastructure and verifies the functionality of a hardware component is described. The proposed verification system uses SystemC user-defined channel as communication interface between variables of SystemC module and registers of Verilog module. The functional verification of an UART is performed on the proposed verification system. SystemC provides class library for hardware modeling and has an advantage of being able to design a system consisting hardware and software in higher abstraction level than register transfer level. Source codes of SystemC modules are reusable with a minor adaptation on verifying functionality of another hardware component.

• Applied Microscopy
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• v.36 no.1
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• pp.7-16
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• 2006

A new remote access system for a 1.3 MV high voltage electron microscope has been developed. Almost all essential functions for HVEM operation, huck as stage control, specimen tilting, TV camera selection and image recording, are successfully embedded into this prototype of the remote system. Particularly, this system permits perfect and precise operation of the goniometer and also controls the high resolution digital camera via simple Web browsers. Transmission of control signals and communication with the microscope is accomplished via the global ring network for advanced applications development (GLORIAD). This fact makes it possible to realize virtual laboratory to carry out practical national and international HVEM collaboration by using the present system

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.4
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• pp.274-279
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• 2009

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In this paper, verification environments based-on SystemVerilog and SystemC, one is native-code co-verification environment which makes prompt functional verification possible and another is SystemVerilog layered testbench which makes clock-level verification possible, are implemented. In native-code co-verification, HW and SW parts of SoC are respectively designed with SystemVerilog and SystemC after HW/SW partitioning using SystemC, then the functional interaction between HW and SW parts is carried out as one simulation process. SystemVerilog layered testbench is a verification environment including corner case test of DUT through the randomly generated test-vector. We adopt SystemC to design a component of verification environment which has multiple inheritance, and we combine SystemC design unit with the SystemVerilog layered testbench using SystemVerilog DPI and ModelSim macro. As multiple inheritance is useful for creating class types that combine the properties of two or more class types, the design of verification environment adopting SystemC in this paper can increase the code reusability.