• Title/Summary/Keyword: Vacuum annealing

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Graphene Cleaning by Using Argon Inductively Coupled Plasma

  • Im, Yeong-Dae;Lee, Dae-Yeong;Ra, Chang-Ho;Yu, Won-Jong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.197-197
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    • 2012
  • Device 제작에 사용된 graphene은 일반적인 lithography 공정에서 resist residue에 의한 오염을 피할 수 없으며 이로 인하여 graphene의 pristine한 성질을 잃어버린다. 본 연구에서는 graphene을 저밀도의 argon inductively coupled plasma (Ar-ICP)를 통해 처리함으로서 graphene based back-gated field effect transistor (G-FET)의 특성변화를 유도한 결과에 대해서 보고한다. Argon capacitively coupled plasma (Ar-CCP)은 에 노출된 graphene은 강한 ion bombardment energy로 인하여 쉽게 planar C-C ${\pi}$ bonding (bonding energy: 2.7 eV)이 breaking되어 graphene의 defect이 발생되었다. 하지만 우리의 경우 저밀도의 Ar-ICP가 적용될 때 graphene의 defect이 제한되며 이와 동시에 contamination 만을 제거할 수 있었다. 소자의 전기적 측정 (Gsd-Vbg)을 통하여 contamination으로 인하여 p-doping된 graphene은 pristine 상태로 회복되었으며 mobility도 회복됨이 확인되었다. Ar-ICP를 이용한 graphene cleaning 방법은 저온공정, 대면적 공정, 고속공정을 모두 만족시키며 thermal annealing, electrical current annealing을 대체하여 graphene 기반 소자를 생산함에 있어 쉽고 빠르게 적용할 수 있는 강점이 있다.

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PI 기판 위에서의 dLTA 공정을 이용한 Grain Boundary와 Grain Size 특성 분석

  • Kim, Sang-Seop;Lee, Jun-Gi;Kim, Gwang-Ryeol;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.338-338
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    • 2011
  • 최근 FPD (Flat Pannel Display) 시장이 커짐에 따라 고효율, 저비용 제작 공정이 화두로 떠오르고 있다. ELA (Excimer Laser Annenling)을 이용한 LTPS (Low Temperature Poly Silicon) 공정은 mobility와 전류 점멸비 등에서 장점을 가지지만, 고비용, 대면적과 short-range에서 uniformity가 어렵다는 단점이 있다. 이를 극복하기 위한 방법으로 dLTA (diode Laser Thermal Annealing) 공정에 대한 연구가 진행되고 있다. 본 연구에서는 Flexible Display을 만들기 위한 방법으로 dLTA 공정을 진행하였다. 이 방법은 PI (Poly imide) 기판 위에 a-Si을 ICP CVD로 증착시킨 후, Diode Laser (980 nm)를 이용한 annealing을 통하여 a-Si이 poly-Si으로 결정화가 되는 것을 확인하였고, 에너지 조사량에 따른 grain boundary와 grain size을 통하여 비교 분석하였다. 실험 결과 ELA 공정을 이용한 것과 버금가는 실험 결과를 얻을 수 있었다.

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Real-time X-ray Scattering as a Nanostructure Probe for Organic Photovoltaic Thin Films

  • Lee, Hyeon-Hwi;Kim, Hyo-Jeong;Kim, Jang-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.181-181
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    • 2013
  • Recently, nanostructure and the molecular orientation of organic thin films have been largely paid attention due to its importance in organic electronics such as organic thin film transistors (OTFTs), organic light emitting diodes (OLEDs), and organic photovoltaics (OPVs). Among various methods, the diffraction and scattering techniques based on synchrotron x-rays have shown powerful results in organic thin film systems. In this work, we introduce the in-situ annealing system installed at PLS-II (Pohang Light Source II) for organic thin films by simultaneously conducting various x-ray scattering measurements of x-ray reflectivity, conventional x-ray scattering, grazing incidence wide angle x-ray scattering (GI-WAXS) and so on. Using the in-situ measurement, we could obtain real time variation of nanostructure as well as molecular orientation during thermal annealing in metal-phthalocyanine thin films. The variation of surface and interface also could be simultaneously investigated by the x-ray reflectivity measurement.

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Electrical and Optical Properties of ZnO Transparent Conducting Thin Films by Pyrosol Deposition Method (Pyrosol법에 의한 ZnO투명전도막의 전기적 광학적 특성)

  • 조우영;송진수;강기환;윤경훈;임경수
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.6
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    • pp.965-970
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    • 1994
  • ZnO transparent conducting oxide thin films have been prepared by Pyrosol deposition method and the effects of the different experimental variables on the electrical resistivity and optical transmittance of the prepared films have been investigated in details. The best film with a resistivity of about 8 X 10S0-2TΩcm and transmittance about 80% has been obtained at the substrate temperature of 4$25^{\circ}C$ by using HS12T+CHS13TOH(1:3) solvent and NS12T carrier gas after annealing at 20$0^{\circ}C$ for 40 minutes in vacuum. Furthermore, We have also found the effect of substrate temperature on crystallographic orientation and surface morphology. Annealing of the as-deposited film in vacuum leads to a substantial reduction in resistivity without affecting the optical transmittance and crystallographic orientation.

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Deposition Technology of Copper Thin Films for Multi-level Metallizations (다층배선을 위한 구리박막 형성기술)

  • 조남인
    • Journal of the Microelectronics and Packaging Society
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    • v.9 no.3
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    • pp.1-6
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    • 2002
  • A low temperature process technology of copper thin films has been developed by a chemical vapor deposition technology for multi-level metallzations in ULSI fabrication. The copper films were deposited on TiN/Si substrates in helium atmosphere with the substrate temperature between $130^{\circ}C$ and $250^{\circ}C$. In order to get more reliable metallizations, effects on the post-annealing treatment to the electrical properties of the copper films have been investigated. The Cu films were annealed at the $5 \times10^{-6}$ Torr vacuum condition and the electrical resistivity and the nano-structures were measured for the Cu films. The electrical resistivity of Cu films shown to be reduced by the post-annealing. The electrical resistivity of 2.0 $\mu \Omega \cdot \textrm{cm}$ was obtained for the sample deposited at the substrate temperature of $180^{\circ}C$ after vacuum annealed at $300^{\circ}C$. The resistivity variations of the films was not exactly matched with the size of the nano-structures of the copper grains, but more depended on the contamination of the copper films.

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Electrode dependences of MFSFET Characteristics using BaMgF$_4$ Thin Films (BaMgF$_4$박막을 이용한 MFSFET특성의 전극의존성)

  • 김채규;정순원;김진규;김용성;이남열;김광호;유병곤;이원재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.465-468
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    • 1999
  • Electrical properties of metal-ferroelectric-semiconductor field effect transistor(MFSFET) using $BaMgF_4$ thin films grown on p-Si(100) substrates have been investigated. $BaMgF_4$ thin films have been directly deposited on the p-Si(100) wafers at a low temperature of $300^{\circ}C$ in an ultra high vacuum(UHV) system. First an in-situ post-deposition annealing was conducted for 20s at $650^{\circ}C$ and second an in-situ post-annealing was conducted for 10s at $950^{\circ}C$. The electrical properties of MFSFET compared with using A1 and Pt electrodes.

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Deposition Technology of Copper Thin Films for Multi-level Metallizations (다층배선을 위한 구리박막 형성기술)

  • 조남인;정경화
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.05a
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    • pp.180-182
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    • 2002
  • Copper thin films are prepared by a chemical vapor deposition technology for multi-level metallzations in ULSI fabrication. The copper films were deposited on TiN/Si substrates in helium atmosphere with the substrate temperature between $120^{\circ}C$ and $300^{\circ}C$. In order to get more reliable metallizations, effects on the post-annealing treatment to the electrical properties of the copper films have been investigated. The Cu films were annealed at the $5\times$10^{-6}$ Torr vacuum condition, and the electrical resistivity and the nano-structures were measured for the Cu films. The electrical resistivity of Cu films shown to be reduced by the post-annealing. The electrical resistivity of 2.2 $\mu$$\Omega$.cm was obtained for the sample deposited at the substrate temperature of $180^{\circ}C$ after vacuum annealed at $300^{\circ}C$. The resistivity variations of the films was not exactly matched with the size of the nato-structures of the copper grains, but more depended on the deposition temperature of the copper films.

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A study on the spin on glass (SOG) from polysilazane resin for the premetal dielectric (PMD) layer of sub-quarter micron devices (초고집적소자의 층간절연막용 polysilazane계 spin on glass (SOG)에 관한 연구)

  • 나사균;정석철;이재관;김진우;홍정의;이원준
    • Journal of the Korean Vacuum Society
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    • v.9 no.1
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    • pp.69-75
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    • 2000
  • We have investigated the feasibility of spin on glass (SOG) film from polysilazane-type resin as a premetal dielectric (PMD) layer of the next-generation ultra-large scale integrated (ULSI) devices. A commercial polysilazane resin and a polysilazane-type resin with oxidizing agent were spin-coated and cured to form SOG films. In order to study the effect of oxidizing agent and annealing, the SOG films were characterized as cured and after annealing at $400^{\circ}C$ to $900^{\circ}C$. the density and the resistance against wet chemical of the SOG films were improved by the addition of oxidizing agent, because oxidizing agent enhanced the conversion from polysilazane polymer to $SiO_2$. The hole profile issue associated with insufficient curing of polysilazane in narrow gaps was also resolved by oxidizing agent, while the gapfill capability of SOG was not deteriorated by oxidizing agent.

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Ag(100) 기판위에 증착된 Nb Cluster에 관한 STM연구

  • 윤홍식;유미애;한권환;이준희;양경득;여인환
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.140-140
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    • 2000
  • The initial growth mode of Nb on Ag(11) in sub-monolayer regime and the influence of subsequent 520K annealing are studied using UHV Scanning Tunneling Microscopy. E-beam evaporated Nb is deposited onto the substrate at RT, and STM measurements are carried out at RT and 78 K. With Nb being immiscible in bulk Ag, 3D islands formation begins at early stage and no particular ordered structure is found. After annealing to 520K, most of islands are disappeared from terrace. There exist 2 possibilities. : (1) Diffusion of Nb into the 2nd or 3rd layer of Ag substrate or (2) agglomeration of Nb on Ag at higher temperature. A model will be given to explain the evidence. In addition, we investigated the change of STM image according to bias voltage depending on island size. Possible physical mechanism responsible for such behavior together with interaction between Nb islands and reactive gases will be also discussed.

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Low temperature solid phase crystallization of amorphous silicon thin film by crystalline activation

  • Kim, Hyung-Taek;Kim, Young-Kwan
    • Journal of Korean Vacuum Science & Technology
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    • v.2 no.2
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    • pp.97-100
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    • 1998
  • We have investigated the effects of crystalline activation on solid phase crystallization (SPC) of amorphous silicon (a-Si) thin films. Wet blasting and self ion implantation were employed as the activation treatments to induce macro or micro crystalline damages on deposited a-Si films. Low temperature and larger grain crystallization were obtained by the applied two-step activation. High degree of crystallinity was also observed on both furnace and rapid SPC. crystalline activations showed the promotion of nucleation on the activated regions and the retardation of growth in an amorphous matrix in SPC. The observed behavior of two-step SPC was strongly dependent on the applied activation and annealing processes. It was also found that the diversified effects by macro and micro activations on the SPC were virtually diminished as the annealing temperature increased.

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