• The Transactions of the Korea Information Processing Society
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• v.2 no.3
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• pp.425-432
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• 1995

In this paper we propose a design and implementation technique of a universal automatic test pattern generator(UATPG) which is well suited for VLSI digital circuits. UATPG is designed to extend the capabilities of the existing APTG and to provide a convenient environment to computer-aided design(CAD) users. We employ heuristic techniques in line justification and fault propagation for functional gates during test pattern generation for a target fault. In addition, the flip-flops associated with design for testability (DFT) are exploited for pseudo PIs and pseudo POs to enhance the testabilities of VLSI circuits. As a result, UATPG shows a good enhancement in convenient usage and performance.

• The Magazine of the IEIE
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• v.24 no.12
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• pp.99-111
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• 1997

• The Journal of Natural Sciences
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• v.8 no.1
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• pp.115-121
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• 1995

The Conventional database management system is not applicable because of their inadequate performance and difficulty of CAD database that is dependant to hierarchical structure and to repeat accesses of large data. For effective management and easy tool integration of CAD database, hierarchy Interface System(HIS) is designed and GROCO(Graph Representation fOr Complex Objects) Model is presented. Hierarchy Interface System which is composed of two subsystems of a configurator and a converter is designed for the interface between a conventional database management system and CAD tools. GROCO Model is a directed cyclic graph having five node-types for representing semantics and supports efficiently CAD database characters having a hierarchical structure of complex objects.

• ETRI Journal
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• v.7 no.3
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• pp.3-11
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• 1985

CAD tools that has the common data base system are important to design for the VLSI. Each CAD tools are used to design for the VLSI, and to reduce the complexity, man-error, design-time for the IC design. CIF, a layout description language, was proved to be effective in this point. In this article, the program which translates pattern generation data for the mask tooling into CIF data was described. This program has its character in the unification of physical design data base for a design automated CAD system. The output format of CIF data is fitting to the input of the kgraph that is graphic layout editor, and the name of each layer and the output file is extended as a user's option.

• The Magazine of the IEIE
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• v.16 no.1
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• pp.1-4
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• 1989

• The Magazine of the IEIE
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• v.16 no.1
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• pp.5-11
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• 1989

• The Magazine of the IEIE
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• v.10 no.4
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• pp.16-21
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• 1983

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.589-592
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• 2004

The CORDIC algorithm can be implemented very simple H/W, but needs a lot of latency to compute trigonometric function. The RA(Redundant Arithmetic) resolves this problem, but also has difficulty to determine the directions of micro-rotations. The pre-computed direction of micro-rotation algorithm relieves the RA of this matter. In this paper, we proposed the modified the pre-computed algorithm adopted with a table-lookup. Instead of reducing H/W complexity, its performance and calculation errors are improved.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.379-382
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• 2000

We designed a self-timed interface circuit for efficient communication in IP (Intellectual Property)-based system with high-speed self-timed FIFO and a set of self-timed event logic library with 0.25um CMOS technology. Optimized self-timed standard cell layouts and Verilog models are generated for top-down design methodology. A method for mitigating a design bottleneck when it comes to tolerate clock skew is described. With clock control method and FIFO, we implemented high-speed 32bit-interface chip for self-timed system, which generated maximum system clock is 2.2GHz. The size of the core is about 1.1mm x 1.1mm.

• ETRI Journal
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• v.8 no.3
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• pp.67-78
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• 1986

CAD 시스팀의 설계 도구 및 설계 데이터가 복잡하고 방대해 짐에 따라 DBMS를 통한 통합적이고 효율적인 데이터베이스 관리의 필요성이 대두하게 되었다. 본고에서는 주로 VLSI설계를 위한 CAD DBMS의 필용성과 이점, CAD특성에 따른 요구 조건을 살펴보고, 관계형 모델의 특성과 이 모델을 CAD 응용에 이용하기 위한 확장 기법에 관하여 논의하였다. 이러한 확장 기법은 설계 데이터의 계층적 특성을 반영한 질의어 생성, 공간적 탐색을 위한 데이터 구조, nested relation의 허용 등이며, 복잡한 오브젝트 특성을 제공하기 위해, 사용자가 원하는 데이터 유형이나 오퍼레이션을 지정할 수 있게 하는 기법도 포함된다. 끝으로 실제적으로 관계형 모델에 기초한 CAD DBMS의 연구, 개발 사례를 기술하였다.