• ETRI Journal
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• v.38 no.1
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• pp.185-194
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• 2016

In this paper, a novel rate control scheme for low delay video coding of High Efficiency Video Coding (HEVC) is proposed. The proposed scheme is developed by considering a new temporal prediction structure of HEVC. In the proposed scheme, the relationship between bit rate and quantization step is exploited firstly to formulate an accurate quadratic rate-quantization (R-Q) model. Secondly, a method of determining the quantization parameters (QPs) for the first frames within a group of pictures is proposed. Thirdly, an accurate frame-level bit allocation method is proposed for HEVC. Finally, based on the proposed R-Q model and the target bit allocated for the frame, the QPs are predicted for coding tree units by using rate-distortion (R-D) optimization. We compare our scheme against that of three other state-of-the-art rate control schemes. Experimental results show that the proposed rate control scheme can increase the Bjøntegaard delta peak signal-to-noise ratio by 0.65 dB and 0.09 dB on average compared with the JCTVC-I0094 and JCTVC-M0036 schemes, respectively, both of which have been implemented in an HEVC test model encoder; furthermore, the proposed scheme achieves a similar R-D performance to Wang's scheme, as well as obtaining the smallest bit rate mismatch error of all the schemes.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.3
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• pp.841-846
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• 2010

This paper presents design and implementation of an intelligent video surveillance system. The proposed system has advantages of management efficiency and operation robustness unrelated to working condition compared to conventional CCTV based system. The system hardware is designed and implemented by using commercial chips such as digital media processor and video encoder, video decoder and the functions of software are to analyze temperature distribution of a infrared image and to detect disaster situation such as fire. The required functions are confirmed by testing of the prototype and we verified practicality of the system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.5
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• pp.868-874
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• 2007

A real-time frame-layer rate control algorithm with a token bucket traffic shaper is proposed for minimizing video duality variation. The proposed rate control method uses a non-iterative optimization method for low computational complexity, and performs bit allocation at the frame level to minimize variation in distortion between frames. In order to reduce the quality fluctuation, we use a sliding window scheme which does not require the pre-analysis process. Therefore, the proposed algorithm does not produce the delay from encoding, and is suitable for real-time low-complexity video encoder. Experimental results indicate that the proposed control method provides better PSNR performance than the existing rate control method.

• ETRI Journal
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• v.44 no.1
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• pp.38-50
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• 2022

This paper presents a study on the use of encoder-derived features in decoder-side depth estimation. The scheme of multiview video encoding does not require the transmission of depth maps (which carry the geometry of a three-dimensional scene) as only a set of input views and their parameters are compressed and packed into the bitstream, with a set of features that could make it easier to estimate geometry in the decoder. The paper proposes novel recursive block splitting for the feature extraction process and evaluates different scenarios of feature-driven decoder-side depth estimation, performed by assessing their influence on the bitrate of metadata, quality of the reconstructed video, and time of depth estimation. As efficient encoding of multiview sequences became one of the main scopes of the video encoding community, the experimental results are based on the "geometry absent" profile from the incoming MPEG Immersive video standard. The results show that the quality of synthesized views using the proposed recursive block splitting outperforms that of the state-of-the-art approach.

• Journal of Broadcast Engineering
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• v.10 no.3
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• pp.392-400
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• 2005

Highly integrated MPEG-4@SP video compression engine, VideoCore, is proposed for mobile application. The primary components of video compression require the high memory bandwidth since they access the external memory frequently. They include motion estimation, motion compensation, quantization, discrete cosine transform, variable length coding, and so on. The motion estimation processor adopted in VideoCore utilizes the small-size local memories such that the video compression system accesses external memory as less frequently as possible. The entire video compression system is divided into two distinct sub-systems: the integer-unit motion estimation part and the others, and both operate concurrently in a pipelined architecture. Thus the VideoCore enables the real-time high-quality video compression with a relatively low operation frequency.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.565-568
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• 2005

Even though there has been a great deal of research and development for the compression techniques such as H.263, MPEG-1, and MPEG-2 in DVR systems, an efficient scheme for storing, accessing, and managing the huge amount of video data from multi-channel cameras needs to be developed. In this paper, we describe an implementation of MPEG-4 encoder for PC-based real-time multi-channel DVR systems.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.864-867
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• 2002

Introduction of digital communication network such as Integrated Services Digital Networks(ISDN) and digital storage media have rapidly developed. Due to a large amount of image data, compression is the key techniques in still image and video using digital signal processing for transmitting and storing. Digital image compression provides solutions for various image applications that represent digital image requiring a large amount of data. in this paper, the proposed DWT(Discrete Wavelet Transform) filter bank is consisted of simple architecture, but it is efficiently designed that a user obtains a wanted compression rate as only input parameter. If it is implemented by FPGA chip, the designed encoder operates in 12MHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.260-264
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• 2013

This paper proposes a fast enhancement layer coding method to reduce computational complexity for Scalable HEVC (SHVC) which is based on High Efficiency Video Coding (HEVC). The proposed method decreases encoding time by simplifying Rate Distortion Optimization (RDO)for enhancement layers (EL). The simplification is achieved by restricting CU depths based on the correlation of coding unit (CU) depths between adjacent layers and scalability (spatial or quality) of EL. Comparing with the performance of SHM 1.0 software encoder, the proposed method reduces the encoding time by up to 31.5%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.10C
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• pp.968-974
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• 2009

In this paper, we present a skipping method of transformation and quantization process using skip blocks estimation in fast H.264 video encoder. In order to reduce the complexity, we estimate skip mode blocks using integer discrete cosine transform and quantization and a skipping condition is derived by the analysis of those processes. The experimental result show that the proposed algorithm has effective estimations.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.285-286
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• 2006

H.264 provide good coding efficiency compared with existing video coding standards as H.263, MPEG-4, etc. However, H.264 require the increase of encoder complexity. In this paper, fast mode decision algorithm by skipping variable block size motion estimation and spatial-predictive coding, which occupies most encoder complexity, is proposed. Experimental results show that the proposed approach can save encoding time to 55% compared with the H.264 standard.