• Journal of information and communication convergence engineering
• /
• v.13 no.2
• /
• pp.139-143
• /
• 2015

A push-push voltage controlled dielectric resonator oscillator (VCDRO) with a modified frequency tuning structure using broadside couplers is investigated. The push-push VCDRO designed at 16 GHz is manufactured using a low temperature co-fired ceramic (LTCC) technology to reduce the circuit size. The frequency tuning structure using a broadside coupler is embedded in a layer of the A6 substrate by using the LTCC process. Experimental results show that the fundamental and third harmonics are suppressed above 15 dBc and 30 dBc, respectively, and the phase noise of push-push VCDRO is -97.5 dBc/Hz at an offset frequency of 100 kHz from the carrier. The proposed frequency tuning structure has a tuning range of 4.46 MHz over a control voltage of 1-11 V. This push-push VCDRO has a miniature size of 15 mm×15 mm. The proposed design and fabrication techniques for a push-push oscillator seem to be applicable in many space and commercial VCDRO products.

• Journal of electromagnetic engineering and science
• /
• v.5 no.1
• /
• pp.8-13
• /
• 2005

The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.41 no.5
• /
• pp.63-68
• /
• 2004

This paper presents a design of 12㎓ VCBRO(voltage controlled dielectric resonator oscillator) using a novel PBG(photonic band gap) ground plane and a varactor circuit that enhances the frequency linearity of VCO with different bias to varactors. The PBG structures are used for suppressing the second and third harmonics without any filters. To simulate the accurate resonating frequency, a DR coupled with microstrip lines is analysed by FTM(finite element method) simulation, and the results are transformed into scattering parameters to design the VCO. Some measured results are presented to show the usefulness of the proposed techniques.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.10 no.6
• /
• pp.816-824
• /
• 1999

Design and performance of 18 GHz phase locked dielectric resonator oscillator(PLDRO) for Point-to-point radio link using analog phase locked loop is described which achieve high stability and low SSB phase noise. The module consists of an 18 GHz voltage controlled dielectric resonator oscillator(VCDRO), buffered amplifier, analog phase detector which are integrated to form a miniature hybrid circuit. In addition, containing a low phase noise VHF PLL has been designed to lock any other conventional N times frequency of crystal oscillator. The module achieves stable phase locked state, exhibits output power of 21 dBm at 18.00 GHz, -34 dBc harmonic suppression and -75 dBc/Hz phase noise at 10 kHz offset frequency from carrier.

• Journal of IKEEE
• /
• v.16 no.2
• /
• pp.121-126
• /
• 2012

In this paper, a push-push VCDRO (Voltage Controlled Dielectric Resonator Oscillator) with a modified frequency tuning structure is investigated. The push-push VCDRO designed at 16GHz is manufactured using a LTCC (Low Temperature Co-fired Ceramic) technology to reduce the circuit size. The frequency tuning structure is embedded in intermediate layer of A6 substrate by an advantage of LTCC process. Experimental results show that the fundamental frequency suppression is above 30dBc, the frequency tuning range is 0.43MHz over control voltage of 0 to 12V, and phase noise of push-push VCDRO presents a good performance of -103dBc/Hz at 100KHz offset frequency from carrier.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.2
• /
• pp.408-414
• /
• 2005

The VCDRO(Voltage Controlled Dielectric Resonate. Oscillator) with low phase noise is designed using nonlinear analysis, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise performance, and the quality factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCDRO and the reliability analysis is accomplished to estimate the probability of operation at the end of life. The developed VCDRO has the oscillating tuning factor of 0.56MHZ1V for the control voltage range of 0-l2V. This VCDRO requires the DC power of 136mW. The phase noise characteristics exhibit good performances of -94.18dBc/Hz (a)10KHz and -116.3dBc/Hz (a)100KHz. And, the output power over 7.33dBm is measured.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.12
• /
• pp.28-35
• /
• 1993

The MESFET can be used as a three-terminal varactor by employing gate depletion capacitance Cg. In this paper, a novel VCDRO(voltage controlled dielecric resonator oscillator) is designed to apply VCDRO with this concept. The VCDRO produced 6.33dBm output power at a frequency of 11.058GHz and tunning bandwidth of 45MHz. The advantage of using the MESFET as a three-terminal varactor is to let the MESFET play both roles at the same time, thus simplifying the circuit configuration and fabrication. This finding demonstrates the potential of using both real and imaginary parts of the equivalent impedance of the active device.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.41 no.10
• /
• pp.109-117
• /
• 2004

In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

• Journal of Navigation and Port Research
• /
• v.27 no.5
• /
• pp.513-517
• /
• 2003

In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator} applied to X-band as stable source is implementea and constructed with a MESFET for low noise, a dielectric resonator of high frequency selectivity and high Q varactor diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated through the harmonic balance simulation technique to provide the optimum performance. The measured results of a fabricated VCDRO show that output is 2.22dBm at 12.05GHz. harmonic suppression -30dBc. phase noise -130dBc at 100kHz offset. and sweep range of varactor diode $\pm$18.7MHz. respectively. This oscillator will be available to X-band application.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2003.10a
• /
• pp.398-402
• /
• 2003

In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator) applied to FMCW(Frequency Modulated Continuous Wave)Radar as stable source is implemented and constructed with a MESFET for low noise, a dielectric resonator of high frequency selectivity, and high Q varator diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated thrash harmonic balance simulation technique to provide the optimum performance. The measured result of a fabricated VCDRO shows that output is 2.22dBm at 12.05GHz, harmonic suppression -30dBc, phase noise -130dBc at 100kHz offset, and sweep range of varator diode $\pm$18.7MHz, respectively. This oscillator will be available to FMCW Radar.