• Journal of the Microelectronics and Packaging Society
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• v.10 no.3
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• pp.19-27
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• 2003

Surface finishes of PCB laminates are important in the solder joint reliability of flip chip package because the types and thicknesses of intermetallic compound(IMC), and compositions and hardness of solders are affected by them. In this study, effects of surface finishes of PCB on the low cycle fatigue resistance of Sn-based lead-free solders; Sn-3.5Ag, Sn-3.5Ag-XCu(X=0.75, 1.5), Sn-3.5Ag-XBi(X=2.5, 7.5) and Sn-0.7Cu were investigated for the Cu and Au/Ni surface finish treatments. Displacement controlled room temperature lap shear fatigue tests showed that fatigue resistance of Sn-3.5Ag-XCu(X=0.75, 1.5), Sn-3.5Ag and Sn-0.7Cu alloys were more or less the same each other but much better than that of Bi containing alloys regardless of the surface finish layer used. In general, solder joints on the Au/Ni finish showed better fatigue resistance than those on the Cu finish. Cross-sectional fractography revealed microcracks nucleation inside of the interfacial IMC near the solder mask edge, more frequently on the Cu than the Au/Ni surface finish. Macro cracks followed the solder/IMC interface in the Bi containing alloys, while they propagated in the solder matrix in other alloys. It was ascribed to the Bi segregation at the solder/IMC interface and the solid solution hardening effect of Bi in the $\beta-Sn$ matrix.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.37-45
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• 2004

Electroless Ni(P) has been widely used for under bump metallization (UBM) of flip chip and surface finish layer in microelectronic packaging because of its excellent solderability, corrosion resistance, uniformity, selective deposition without photo-lithography, and also good diffusion barrier. However, the brittle fracture at solder joints and the spatting of intermetallic compound (IMC) associated with electroless Ni(P) are critical issues for its successful applications. In the present study, the mechanism of IMC spatting and microstructure change of the Ni(P) film were investigated with varying P content in the Ni(P) film (4.6,9, and $13 wt.\%$P). A reaction between Sn penetrated through the channels among $Ni_3Sn_4$ IMCs and the P-rich layer ($Ni_3P$) of the Ni(P) film formed a $Ni_3SnP$ layer. Thickening of the $Ni_3SnP$ layer led to $Ni_3Sn_4$ spatting. After $Ni_3Sn_4$ spatting, the Ni(P) film directly contacted the molten solder and the $Ni_3P$ phase further transformed into a $Ni_2P$ phase. During the crystallization process, some cracks formed in the Ni(P) film to release tensile stress accumulated from volume shrinkage of the film.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.1
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• pp.33-38
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• 2001

We investigate the via-size dependance of as-electroplated- and reflow-bump shapes for realizing both high-density and high-aspect ratio of solder bump. The solder bump is fabricated by subsequent processes as follows. After sputtering a TiW/Al electrode on a 5-inch Si-wafer, a thick photoresist for via formation it obtained by multiple-codling method and then vias with various diameters are defined by a conventional photolithography technique using a contact alinger with an I-line source. After via formation the under ball metallurgy (UBM) structure with Ti-adhesion and Cu-seed layers is sputtered on a sample. Cu-layer and Sn/pb-layer with a competition ratio of 6 to 4 are electroplated by a selective electroplating method. The reflow-bump diameters at bottom are unchanged, compared with as-electroplated diameters. As-electroplated- and reflow-bump shapes, however, depend significantly on the via size. The heights of as-electroplated and reflow bumps increase with the larger cia, while the aspect ratio of bump decreases. The nearest bumps may be touched by decreasing the bump pitch in order to obtain high-density bump. The touching between the nearest bumps occurs during the overplating procedure rather than the reflowing procedure because the mushroom diameter formed by overplating is larger than the reflow-bump diameter. The arrangement as zig-zag rows can be effective for realizing the flip-chip-interconnect bump with both high-density and high-aspect ratio.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2001.06a
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• pp.8-8
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• 2001

초고속 증착은 짧은 시간에 박막 형성을 가능하게 하므로 window glass 코팅등의 대면적 코팅에 있어서 비용을 절감 시키고, 대량생산을 가능하게 만들기 때문에 관심이 집중되고 있다. 고속증착 공정으로는 high current arc, laser arc, hollow cathode discharge ion plating 그리고 마그네트론 스퍼터링법 등이 있다. 특별히 마그네트론 스퍼터링법은 3m이상의 넓이에 코팅을 할때 두께가 매우 균일하며, 증착율은 evaporation 공정에 비해 경제적, 기능적인 면에서 효율적이다. 그리고 증착된 박막은 매우 조밀하고 좋은 밀착력을 갖고 있으며, 고융점 금속을 포함하여 금속 합금 및 혼합물의 비율을 조정 및 금속 산화물, 질화물, 탄화물 등과 같은 금속의 증착도 stoichiometry를 조정하여 박막을 합성 시키는데 있어서 효과적이다. 이러한 초고속 증착을 만들기 위한 마그네트론 스퍼터링법의 요건은 마그네트론 원이 높은 타켓 power density를 가져야 하며, 타켓에서 효율적으로 플라즈마를 구속하여 스퍼터 되는 이온의 양을 최대화 시킬 수 있어 한다. 따라서 본 실험에서는 초고속 증착을 위해서 직경 50mm 타켓의 UBM magnetron원을 설계 제작하였다. 고밀도의 플라즈마를 형성시키기 위해서, Poisson simulation c code를 이용하여 자기장의 방향, 세기 및 밀도를 측정 하였고, 자기장 측정기(Gauss meter)를 이용하여 실제 자장을 측정 비교 분석하였다. 상기의 data를 바탕으로 여러 형상의 마그네트론원을 설계, 제작하였고. 마그네트론 원의 특성 분석을 위해 I-V 방전 특성을 평가하였고 substrate ion current density와 박막의 증착율을 측정하였다.duty-on 시간의 증가에 따라 $Cr_2N$ 상의 형성이 점점 많아져 80% duty-on 시간 경우에는 거의 CrN과 $Cr_2N$ 상이 공존하는 것으로 나타났다. 또한 duty-on 시간이 증가할수록 회절피크의 세기가 증가하여 결정화가 더 많이 진행되어짐을 알 수 있었다. 마찬가지로 바이어스 펄스이 주파수에 다른 결정성의 변화도 펄스의 주파수가 증가할수록 박막이 결정성이 좋아지고 $Cr_2N$ 상이 쉽게 형성되었다. 증착 진공도에 따른 결정성은 상대적으로 질소의 농도가 높은 낮은 진공도에서는 CrN 상이 주로 형성되었으며, 반대로 높은 진공도에서는 $Cr_2N$ 상이 많이 만들어졌다. 즉 $1.3{\times}10^{-2}Torr$의 증착 진공도에서는 CrN 상만이 보이는 반면 $9.0{\tiems}1-^{-2}Torr$ 진공도에서부터 $Cr_2N$ 상이 형성되기 시작하여 $5.0{\tiems}10^{-2}Torr$ 진공도에서는 두개의 상이 혼재되어 있음을 알 수 있었다. 박막의 내마모성을 조사한 결과 CrN 박막의 마찰 계수는 초기에 급격하게 증가한 후 0.5에서 0.6 사이의 값으로 큰 변화를 보이지 않았으며, $Cr_2N$ 박막도 비슷한 거동을 보였다.차 이, 목적의 차이, 그리고 환경의 의미의 차이에 따라 경관의 미학적 평가가 달라진 것으로 나타났다.corner$적 의도에 의한 경관구성의 일면을 확인할수 있지만 엄밀히 생각하여 보면 이러한 예의 경우도 최락의 총체적인 외형은 마찬가지로 $\ulcorner$순응$\lrcorner$

• Journal of the Korean institute of surface engineering
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• v.49 no.6
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• pp.580-586
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• 2016

Cr-Si-Al-N coating with different Si content were deposited by hybrid physical vapor deposition (PVD) method consisting of unbalanced magnetron (UBM) sputtering and arc ion plating (AIP). The deposition temperature was $300^{\circ}C$, and the gas ratio of $Ar/N_2$ were 9:1. The CrSi alloy and aluminum targets used for arc ion plating and sputtering process, respectively. Si content of the CrSi alloy targets were varied with 1 at%, 5 at%, and 10 at%. The phase analysis, composition and microstructural analysis performed using x-ray diffraction (XRD) and field emission scanning electron microscopy (FESEM) including energy dispersive spectroscopy (EDS), respectively. All of the coatings grown with textured CrN phase (200) plane. The thickness of the Cr-Si-Al-N films were measured about $2{\mu}m$. The friction coefficient and removal rate of films were measured by a ball-on-disk test under 20N load. The friction coefficient of all samples were 0.6 ~ 0.8. Among all of the samples, the removal rate of CrSiAlN (10 at% Si) film shows the lowest values, $4.827{\times}10^{-12}mm^3/Nm$. As increasing of Si contents of the CrSiAlN coatings, the hardness and elastic modulus of CrSiAlN coatings were increased. The morphology and composition of wear track of the films was examined by scanning electron microscopy (SEM) and energy dispersive spectroscopy, respectively. The surface energy of the films were obtained by measuring of contact angle of water drop. Among all of the samples, the CrSiAlN (10 at% Si) films shows the highest value of the surface energy, 41 N/m.