• Title/Summary/Keyword: Twofish

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Design of Modified MDS Block for Performance Improvement of Twofish Cryptographic Algorithm (Twofish 암호알고리즘의 성능향상을 위한개선 된 MDS 블록 설계)

  • Jeong Woo-Yeol;Lee Seon-Heun
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.5 s.37
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    • pp.109-114
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    • 2005
  • Twofish cryptographic algorithm is concise algorithm itself than Rijndael cryptographic algorithm as AES, and easy of implementation is good, but the processing speed has slow shortcoming. Therefore this paper designed improved MDS block to improve Twofish cryptographic algorithm's speed. Problem of speed decline by a bottle-neck Phenomenon of the Processing speed existed as block that existing MDS block occupies Twofish cryptosystem's critical path. To reduce multiplication that is used by operator in MDS block this Paper removed a bottle-neck phenomenon and low-speed about MDS itself using LUT operation and modulo-2 operation. Twofish cryptosystem including modified MDS block designed by these result confirmed that bring elevation of the processing speed about 10$\%$ than existing Twofish cryptosystem.

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A Study on the MDS performance improvement for Twofish cryptographic algorithm speed-up (Twofish 암호알고리즘의 처리속도 향상을 위한 MDS 성능개선에 관한 연구)

  • Lee, Seon Keun;Kim, Hwan Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.35-38
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    • 2005
  • Treatise that see designed MDS block newly algorithm itself is concise and improve the speed of Twofish cryptographic algorithm that easy of implement is good but the processing speed has slow shortcoming than Rijndael cryptographic algorithm Problem of speed decline by a bottle-neck phenomenon of processing process existed as block that designed MDS block occupies critical path of Twofish cryptographic system Multiplication arithmetic that is used by operator in this MDS convex using LUT arithmetic and modulo-2 arithmetic speed decline and a bottle-neck phenomenon about MDS itself remove. Twofish cryptographic system including MDS block designed newly by these result confirmed that bing elevation of the processing speed about $10\%$ than existing Twofish cryptographic system.

A study on Twofish Cryptoalgorithm Design for Security in the PC Peripheral devices (PC 주변기기에 대한 보안성을 위한 Twofish 암호알고리즘 설계에 관한 연구)

  • Jeong, Woo-Yeol;Lee, Seon-Keun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.2 no.2
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    • pp.118-122
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    • 2007
  • The previous security system was PCI way which has many difficulties for PC novices to use. Moreover the security programs in use are mostly unverified ones as they are using cracks, and are exposed to attacks such as hackers and viruses. Therefore this thesis describes to design the security system of Twofish cryptographic algorithm using USB, which it can be used in general-purpose computers and users can handle it with ease. Users can easily use the security system by using this USB and it is applicable to various security systems that Twofish cryptographic algorithm used in the security system by having variable key length. Also the efficiency of the system can be enhanced as it can perform both encryption and decryption and it has a benefit of downsizing hardware.

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Module Design of Low Volume Cryptography Chip using Twofish Algorithm (Twofish 알고리즘을 이용한 저용량 암호화 Chip의 모듈설계)

  • 김영득;장영조
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.04a
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    • pp.226-228
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    • 2004
  • Twofish 알고리즘은 작은 부피의 로직, Triple-DES보다 강력한 암호화 레벨, 암호화 속도 등율 갖추어 모듈 설계 알고리즘으로 선정하였다. Twofish 알고리즘은 bitwired-XOR, Permutation, S-box, MDS, PHT를 걸치는 H함수를 각기 다른 키로 반복 라운드를 함으로써 대상 데이타를 암호화한다. 64~256bit의 키 크기와 라운딩 횟수를 조정하여 모듈의 부피나 처리속도를 유동성 있게 조절할 수 있는 장점이 있다. 하드웨어 기기와 응용에 사용하기 위하여 VHDL 모듈로 알고리즘을 설계하고 그 동작을 검증하였다. 구현된 회로는 기존의 방법에 비하여 파이프라인 단계를 적용함으로써 약 23%의 속도 향상을 얻을 수 있었다.

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High-speed Hardware Design for the Twofish Encryption Algorithm

  • Youn Choong-Mo;Lee Beom-Geun
    • Journal of information and communication convergence engineering
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    • v.3 no.4
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    • pp.201-204
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    • 2005
  • Twofish is a 128-bit block cipher that accepts a variable-length key up to 256 bits. The cipher is a 16­round Feistel network with a bijective F function made up of four key-dependent 8-by-8-bit S-boxes, a fixed 4­by-4 maximum distance separable matrix over Galois Field$(GF (2^8)$, a pseudo-Hadamard transform, bitwise rotations, and a carefully designed key schedule. In this paper, the Twofish is modeled in VHDL and simulated. Hardware implementation gives much better performance than software-based approaches.

Hardware Implementation of 128-bit Cipher Algorithm Using FPGA (FPGA를 이용한 128-비트 암호 알고리듬의 하드웨어 구현)

  • Lee, Geon-Bae;Lee, Byeong-Uk
    • The KIPS Transactions:PartC
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    • v.8C no.3
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    • pp.277-286
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    • 2001
  • 본 논문에서는 미국 국립표준기술연구소 차세대 표준 암호 알고리듬으로 선정한 Rijndael 암호 알고리듬과 안정성과 성능에서 인정을 받은 Twofish 암호 알고리듬을 ALTERA FPGA를 사용하여 하드웨어로 구현한다. 두가지 알고리듬에 대해 키스케쥴링과 인터페이스를 하드웨어에 포함시켜 구현한다. 알고리듬의 효율적인 동작을 위해 키스케쥴링을 포함하면서도 구현된 회로의 크기가 크게 증가하지 않으며, 데이터의 암호/복호화 처리 속도가 향상됨을 알 수 있다. 주어진 128-비트 대칭키에 대하여, 구현된 Rijndael 암호 알고리듬은 11개의 클럭 만에 키스케쥴링을 완료하며, 구현된 Twofish 암호 알고리듬은 21개의 클럭 만에 키스케쥴링을 완료한다. 128-비트 입력 데이터가 주어졌을 때, Rijndael의 경우, 10개의 클럭 만에 주어진 데이터의 암호/복호화를 수행하고, Twofish는 16개의 클럭 만에 암호/복호화를 수행한다. 또한, Rijndael은 336.8Mbps의 데이터 처리속도를 보이고, Twofish는 121.2Mbps의 성능을 보임을 알 수 있다.

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Personal Data Security in Recruitment Platforms

  • Bajoudah, Alya'a;AlSuwat, Hatim
    • International Journal of Computer Science & Network Security
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    • v.22 no.6
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    • pp.310-318
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    • 2022
  • Job offers have become more widespread and it has become easier and faster to apply for jobs through electronic recruitment platforms. In order to increase the protection of the data that is attached to the recruitment platforms. In this research, a proposed model was created through the use of hybrid encryption, which is used through the following algorithms: AES,Twofish,. This proposed model proved the effectiveness of using hybrid encryption in protecting personal data.

TF-CPABE: An efficient and secure data communication with policy updating in wireless body area networks

  • Chandrasekaran, Balaji;Balakrishnan, Ramadoss;Nogami, Yasuyuki
    • ETRI Journal
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    • v.41 no.4
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    • pp.465-472
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    • 2019
  • The major challenge in wireless body area networks (WBAN) is setting up a protected communication between data consumers and a body area network controller while meeting the security and privacy requirements. This paper proposes efficient and secure data communication in WBANs using a Twofish symmetric algorithm and ciphertext-policy attribute-based encryption with constant size ciphertext; in addition, the proposed scheme incorporates policy updating to update access policies. To the best of the author's knowledge, policy updating in WBAN has not been studied in earlier works. The proposed scheme is evaluated in terms of message size, energy consumption, and computation cost, and the results are compared with those of existing schemes. The result shows that the proposed method can achieve higher efficiency than conventional methods.

High Performance Hardware Implementation of the 128-bit SEED Cryptography Algorithm (128비트 SEED 암호 알고리즘의 고속처리를 위한 하드웨어 구현)

  • 전신우;정용진
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.11 no.1
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    • pp.13-23
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    • 2001
  • This paper implemented into hardware SEED which is the KOREA standard 128-bit block cipher. First, at the respect of hardware implementation, we compared and analyzed SEED with AES finalist algorithms - MARS, RC6, RIJNDAEL, SERPENT, TWOFISH, which are secret key block encryption algorithms. The encryption of SEED is faster than MARS, RC6, TWOFISH, but is as five times slow as RIJNDAEL which is the fastest. We propose a SEED hardware architecture which improves the encryption speed. We divided one round into three parts, J1 function block, J2 function block J3 function block including key mixing block, because SEED repeatedly executes the same operation 16 times, then we pipelined one round into three parts, J1 function block, J2 function block, J3 function block including key mixing block, because SEED repeatedly executes the same operation 16 times, then we pipelined it to make it more faster. G-function is implemented more easily by xoring four extended 4 byte SS-boxes. We tested it using ALTERA FPGA with Verilog HDL. If the design is synthesized with 0.5 um Samsung standard cell library, encryption of ECB and decryption of ECB, CBC, CFB, which can be pipelined would take 50 clock cycles to encrypt 384-bit plaintext, and hence we have 745.6 Mbps assuming 97.1 MHz clock frequency. Encryption of CBC, OFB, CFB and decryption of OFB, which cannot be pipelined have 258.9 Mbps under same condition.

Design of modified Feistel structure for high-capacity and high speed achievement (대용량 고속화 수행을 위한 변형된 Feistel 구조 설계에 관한 연구)

  • Lee Seon-Keun;Jung Woo-Yeol
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.3 s.35
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    • pp.183-188
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    • 2005
  • Parallel processing in block cryptographic algorithm is difficult, because Feistel structure that is basis structure of block cryptographic algorithm is sequential processing structure. Therefore this paper changes these sequential processing structure and Feistel structure made parallel processing to be possible. This paper that apply this modified structure designed DES that have parallel Feistel structure. Proposed parallel Feistel structure could prove greatly block cryptographic algorithm's performance such as DES and so on that could not but have trade-off relation the data processing speed and data security interval because block cryptographic algorithm can not use pipeline method because of itself structural problem. Therefore, modified Feistel structure is going to display more superior security function and processing ability of high speed than now in case apply way that is proposed to SEED, AES's Rijndael, Twofish etc. that apply Feistel structure.

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