• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.31 no.5
• /
• pp.341-344
• /
• 2018

In order to achieve a high efficiency for the silicon solar cell, a passivation characteristic that minimizes the electrical loss at a silicon interface is required. In this paper, we evaluated the applicability of the oxide film formed by ozone for the tunnel silicon oxide film. To this end, we fabricated the silicon oxide film by changing the condition of ozone oxidation and compared the characteristics with the oxide film formed by the existing nitric acid solution. The ozone oxidation was formed in the temperature range of $300{\sim}500^{\circ}C$ at an ozone concentration of 17.5 wt%, and the passivation characteristics were compared. Compared to the silicon oxide film formed by nitric acid oxidation, implied open circuit voltage (iVoc) was improved by ~20 mV in the ozone oxidation and the ozone oxidation after the nitric acid pretreatment was improved by ~30 mV.

• Proceedings of the Korean Magnestics Society Conference
• /
• 2004.12a
• /
• pp.127-128
• /
• 2004

• Proceedings of the Korean Magnestics Society Conference
• /
• 2005.06a
• /
• pp.100-101
• /
• 2005

• Proceedings of the Korean Magnestics Society Conference
• /
• 2003.12a
• /
• pp.92-92
• /
• 2003

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.14 no.8
• /
• pp.688-693
• /
• 2001

A series of Fe/CeO$_2$/Fe$_{75}$Co$_{25}$ tunnel junctions (Magnetic Tunnel Junction, MTJ) having CeO$_2$ barrier layers from 30 to 90$\AA$ in thickness were prepared by ion beam sputtering (IBS) method. In order to compare the properties of MTJs, Fe/Al oxide/Fe-Co tunnel junctions were also prepared. Some junctions with a CeO$_2$ barrier layer showed the ferromagnetic tunneling effect and the highest MR ratio at room temperature was 5%. The electric resistance of junctions with a CeO$_2$ barrier layer was higher that that of junctions with an Al oxide barrier. On the other hand, The interface analysis of the Fe/CeO$_2$ bilayer was conducted by means of X-ray photoelectron spectroscopy (XPS). It was found that CeO$_2$ was decomposed to Ce and $O_2$ during sputtering, and Fe was oxidized with these decomposed $O_2$ molecules. The reduction of both electric resistance and MR ratio may be associated with the decomposed Ce in the barrier layer.r.r.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.260-260
• /
• 2016

최근 고화질 및 대용량 영상의 등장으로 메모리 디바이스에 대한 연구가 활발하다. 메모리 디바이스의 oxide 층은 tunnel layer, trap layer와 blocking layer로 나누어지며, tunnel layer와 trap layer 사이 계면의 상태는 메모리 특성에 큰 영향을 준다. 한편, AlOx는 메모리 디바이스의 tunnel layer에 주로 적용되는 물질로서, AlOx를 형성하는 방법에는 진공공정을 이용하여 증착하는 방법과 알루미늄을 산화시켜 형성하는 방법이 있다. 그 중, 진공공정 방법인 RF 스퍼터를 이용하는 방법은 증착시 sputtering으로 인하여 표면에 손상을 주게 되어, 산화시켜 형성한 AlOx에 비해 막질이 좋지 않다는 단점이 있다. 따라서 본 연구에서는 우수한 막질의 메모리 디바이스를 제작하기 위하여 산화시켜 형성한 AlOx를 tunnel layer로 적용시킨 MOSCAP을 제작하여 메모리 특성을 평가하였다. 제작된 소자는 n-Si (1-20 ohm-cm) 기판을 사용하였다. Tunnel layer는 e-beam evaporator를 이용하여 Al을 5 nm 두께로 증착하고 퍼니스를 이용하여 O2 분위기에서 $300^{\circ}C$의 온도로 1시간 동안 산화시켜 AlOx을 형성하였으며, 비교군으로 RF 스퍼터를 이용하여 AlOx를 10 nm 두께로 증착한 소자를 같이 제작하였다. 순차적으로, trap layer와 blocking layer는 RF 스퍼터를 이용하여 각각 HfOx 30 nm와 SiOx 30 nm를 증착하였다. 마지막으로 전극 물질로는 Al을 e-beam evaporator를 이용하여 150 nm 두께로 증착하였다. 제작된 소자에서 메모리 측정을 한 결과, 같은 크기의 윈도우를 비교하였을 때 산화시킨 AlOx를 tunnel layer로 적용한 MOSCAP에서 더 적은 전압으로도 program 동작이 나타나는 것을 확인하였다. 또한 내구성을 확인하기 위해 program/erase를 103회 반복하여 endurance를 측정한 결과, 스퍼터로 증착한 AlOx를 적용한 MOSCAP에서는 24 %의 메모리 윈도우 감소가 일어난 반면에, 산화시킨 AlOx를 적용한 MOSCAP에서는 메모리 윈도우 감소가 5 % 미만으로 일어났다. 결과적으로 산화시킨 AlOx를 메모리소자의 tunnel layer로 적용한 MOSCAP에서 더 뛰어난 내구성을 나타냈으며, 추후 최적의 oxide 두께와 열처리 조건을 통해 더 뛰어난 메모리 특성을 가지는 메모리 디바이스 제작이 가능할 것으로 기대된다.

• Journal of Magnetics
• /
• v.10 no.4
• /
• pp.137-141
• /
• 2005

We confirmed that the improvement in properties of magnetic tunnel junctions prepared by radical oxidation after thermal treatment was mostly resulted from the redistribution of oxygen at the $AIOx/Co_{90}Fe_{10}$ interface. The as-deposited Al oxide barrier was oxygen-deficient but most of it re-oxidized into $Al_2O_3$, the thermodynamically stable stoichiometric phase, through thermal treatment. As a result, the effective barrier height was increased from 1.52 eV to 2.27 eV. On the other hand, the effective barrier width was decreased from 8.2 ${\AA}$ to 7.5 ${\AA}$. X-ray absorption spectra of Fe and Co clearly showed that the oxygen in the CoFe layer diffused back into the Al barrier and thereby enriched the barrier to close to a stoichiometirc $Al_2O_3$ phase. The oxygen bonded with Co and Fe diffused back by 6.8 ${\AA}$ and 4.5 ${\AA}$ after thermal treatment, respectively. Our results confirm that controlling the chemical structures of the interface is important to improve the properties of magnetic tunnel junctions.

• Proceedings of the Korean Magnestics Society Conference
• /
• 2007.05a
• /
• pp.215.1-215.1
• /
• 2007

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.133-133
• /
• 2009

It is desirable to choose a high-k material having a large band offset with the tunneling oxide and a deep trapping level for use as the charge trapping layer to achieve high PIE (Programming/erasing) speeds and good reliability, respectively. In this paper, charge trapping and tunneling characteristics of high-k hafnium oxide ($HfO_2$) layer with various thicknesses were investigated for applications of tunnel barrier engineered nonvolatile memory. A critical thickness of $HfO_2$ layer for suppressing the charge trapping and enhancing the tunneling sensitivity of tunnel barrier were developed. Also, the charge trap centroid and charge trap density were extracted by constant current stress (CCS) method. As a result, the optimization of $HfO_2$ thickness considerably improved the performances of non-volatile memory(NVM).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.24-25
• /
• 2008

The effect of heat treatment in $HfO_2$ as charge trap with $SiO_2/Si_3N_4/SiO_2$ as tunnel oxide layer in capacitors has been investigated. Rapid thermal annealing (RTA) were carried out at the temperature range of 600 - $900^{\circ}C$. It is found that all devices carried out heat treatment have large threshold voltage shift Especially, device performed heat treatment at $900^{\circ}C$ has been confirmed the largest memory window. Also, Threshold voltage shift of device used conventional $SiO_2$ as tunnel oxide layer was smaller than that with $SiO_2/Si_3N_4/SiO_2$.