• Journal of Magnetics
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• v.5 no.4
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• pp.139-142
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• 2000

The interlayer coupling between adjacent ferromagnetic layers was examined for CoFe/Cu/NiFe trilayer systems. A series of films of CoFe (20 nm)/Cu($t_{cu}$)/NiFe (20 nm) trilayers with Cu spacer thickness, $t_{cu}$, in the range of 1~10 m was deposited on Si(100) wafers at room temperature by DC magnetron sputtering. In order to understand the dependence of the magnetic interaction between ferromagnetic $Co_{90}Fe_{10}$ (wt.%) and $Ni_{81}Fe_{19}$ (wt.%) layers separated by a nonmagnetic Cu spacer on the Cu layer thickness, we investigated the derivative ferromagnetic resonance (FMR) spectra. The FMR results were analyzed using the model of Layadi and Art-man for interlayer interaction. The interlayer coupling constant decreases in an oscillatory manner as the Cu spacer thickness increases up to 10 nm and approaches zero above 10 nm. The interlayer coupling constant is positive for all samples. Hence, it seems that the exchange coupling between adjacent CoFe and NiFe layers separated by a Cu layer is ferromagnetic.

• Progress in Superconductivity
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• v.8 no.2
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• pp.181-185
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• 2007

For more than two decades Nb trilayer ($Nb/Al_2O_3/Nb$) process has been serving as the most stable fabrication process of the Josephson junction integrated circuits. Fast development of semiconductor fabrication technology has been possible with the recent advancement of the fabrication equipments. In this work, we took an advantage of advanced fabrication equipments in developing a superconducting Arithmetic Logic Unit (ALU) by using Nb trilayers. The ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We used DC magnetron sputtering technique for metal depositions and RF sputtering technique for $SiO_2$ depositions. Various dry etching techniques were used to define the Josephson junction areas and film pattering processes. Our Nb films were stress free and showed the $T{_c}'s$ of about 9 K. To enhance the step coverage of Nb films we used reverse bias powered DC magnetron sputtering technique. The fabricated 1-bit, 2-bit, and 4-bit ALU circuits were tested at a few kilo-hertz clock frequency as well as a few tens giga-hertz clock frequency, respectively. Our 1-bit ALU operated correctly at up to 40 GHz clock frequency, and the 4-bit ALU operated at up to 5 GHz clock frequency.

• Journal of the Korean Magnetics Society
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• v.9 no.2
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• pp.104-110
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• 1999

The effect of the composition and the heat treatment on the magnetic and magnetoresistance properties in AgCo alloy films and Fe/AgCo/Fe trilayers prepared by the co-evaporation method were studied. As the alloy film thickness decreases, especially below 50 nm thick, the magnetoresistance decreases and the saturation field increases significantly. The change of the Co content, heat treatment, and deposition of the Fe under/over-layer were effective to prevent the reduction of the and the increasing of the saturation field. For 40 at.%Co sandwiches, the minimum saturation field was obtained in the 20 nm alloy film with 30nm Fe under-over layer annealed at 300 $^{\circ}C$ for 10 min. Its saturation field and the MR ratio were 1.01 kOe 5.16% respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.