• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.647-650
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• 1988

This paper proposes and sketches out a new parallel architecture of transputer-based pyramidal parallel array computer (TPPAC) used to process computationally intensive problems for geometric processing applications such as computer vision, image processing etc. It explores how efficiently the pyramid computer architecture is designed using transputer chips, and poses a new interconnection scheme for TPPAC without using additional transputers.

• Journal of Biomedical Engineering Research
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• v.17 no.4
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• pp.459-468
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• 1996

This paper considers the problem of realising a parallel EMG identifier used in FES (functional electrical stimulation) system on a fixed dimension transputer array. This involves using an identifiestion algorithm in the wavelet transform domain. This algorithm have suggested by the authors in a previous paper(6). The transputer serial links permit higtlly varied and economic network-type connections and the structure enables rapid topological reconfiguration. Analysing the results Showed that the Speed-UPS ranged from 1.82 to 3.44 With 2-4 transputers for corresponding model order, and from 1.82 to 3.97 with increasing the model orders when two and four transputers are used respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.3
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• pp.410-424
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• 1993

In this paper, we present new techniques for designing systolic arrya and asynchronous arrays for digital-signal processings. More specifically, we propose a systolic array with simple local interconnections which achieves optimal performance without having undesirable features such as preloading input data or global broadcasting. As asynchronous array for digital-signal processings, which can speed up the total computation time significantly is also which can speed up the total computation time significantly is also presented. The key component of the asynchronous array is a presented. The key component of the asynchronous array is a comunicaiton protocol which controls input data flow properly and efficiently. Finally, performance of the arrays is analyzed and a simulation using Occam programmed in a Transputer network is reported.