• 제목/요약/키워드: Thin-film Ag electrode

검색결과 70건 처리시간 0.027초

Ag 완충박막 두께에 따른 IGZO/Ag 적층박막의 특성 변화 (Effect of Ag Underlayer Thickness on the Electrical and Optical Properties of IGZO/Ag Layered Films)

  • 김소영;김선경;김승홍;전재현;공태경;최동혁;손동일;김대일
    • 열처리공학회지
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    • 제27권5호
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    • pp.230-234
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    • 2014
  • IGZO/Ag bi-layered films were deposited on glass substrate at room temperature with radio frequency and direct current magnetron sputtering, respectively to consider the effect of Ag buffer layer on the electrical, optical and structural properties. For all deposition, while the thickness of Ag buffer layer was varied as 10, 15, and 20 nm, The thickness of IGZO films were kept at 100 nm, In a comparison of figure of merit, IGZO films with 15 nm thick Ag buffer layer show the higher figure of merit ($1.1{\times}10^{-2}{\Omega}^{-1}$) than that of the IGZO single layer films ($3.7{\times}10^{-4}{\Omega}^{-1}$). From the observed results, it is supposed that the IGZO 100 nm/Ag 15 nm bi-layered films may be an alternative candidate for transparent electrode in a transparent thin film transistor device.

Improved Uniformity in Resistive Switching Characteristics of GeSe Thin Film by Ag Nanocrystals

  • Park, Ye-Na;Shin, Tae-Jun;Lee, Hyun-Jin;Lee, Ji-Soo;Jeong, Yong-Ki;Ahn, So-Hyun;Lee, On-You;Kim, Jang-Han;Nam, Ki-Hyun;Chung, Hong-Bay
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.237.2-237.2
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    • 2013
  • ReRAM cell, also known as conductive bridging RAM (CBRAM), is a resistive switching memory based on non-volatile formation and dissolution of conductive filament in a solid electrolyte [1,2]. Especially, Chalcogenide-based ReRAM have become a promising candidate due to the simple structure, high density and low power operation than other types of ReRAM but the uniformity of switching parameter is undesirable. It is because diffusion of ions from anode to cathode in solid electrolyte layer is random [3]. That is to say, the formation of conductive filament is not go through the same paths in each switching cycle which is one of the major obstacles for performance improvement of ReRAM devices. Therefore, to control of nonuniform conductive filament formation is a key point to achieve a high performance ReRAM. In this paper, we demonstrated the enhanced repeatable bipolar resistive switching memory characteristics by spreading the Ag nanocrystals (Ag NCs) on amorphous GeSe layer compared to the conventional Ag/GeSe/Pt structure without Ag NCs. The Ag NCs and Ag top electrode act as a metal supply source of our devices. Excellent resistive switching memory characteristics were obtained and improvement of voltage distribution was achieved from the Al/Ag NCs/GeSe/Pt structure. At the same time, a stable DC endurance (>100 cycles) and an excellent data retention (>104 sec) properties was found from the Al/Ag NCs/GeSe/ Pt structured ReRAMs.

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Ag 페이스트를 소스와 드레인 전극으로 사용한 OTFT-OLED 어레이 제작 (The Fabrication of OTFT-OLED Array Using Ag-paste for Source and Drain Electrode)

  • 류기성;김영배;송정근
    • 대한전자공학회논문지SD
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    • 제45권5호
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    • pp.12-18
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    • 2008
  • 본 연구는 PC(polycarbonate) 기판 위에 소스(source)/드레인(drain) 전극으로 Ag 페이스트를 스크린 인쇄하여 OTFT(organic thin film transistor)를 제작하였다. 또한 이렇게 제작된 OTFT를 적용하여 OTFT-OLED(organic light emitting diode) 어레이를 제작하였으며 OTFT의 소스 및 드레인 전극과 더불어 데이터 배선전극을 Ag 페이스트를 이용하여 형성하였다. Ag 페이스트는 스크린 마스크의 mesh에 따라 325 mesh용과 500 mesh용을 사용하였으며, 325 mesh용 페이스트는 선폭 60 ${\mu}m$, 500 mesh용 페이스트는 선폭 40 ${\mu}m$까지 인쇄가 가능하였다. 그리고 면저항은 각각 $60m{\Omega}/\square,\;133.1m{\Omega}/\square$이었다. 제작된 OTFT의 성능은 이동도가 자각 0.35 $cm^2/V{\cdot}sec$와 0.12 $cm^2/V{\cdot}sec$, 문턱전압 -4.7 V와 0.9 V이었으며, 전류 점멸비는 ${\sim}10^5$이었다. OTFT-OLED 어레이는 인쇄성이 우수한 500 mesh용 Ag 페이스트를 사용하였으며 OTFT의 채널길이를 50 ${\mu}m$로 설계하여 제작하였다. OTFT-OLED 어레이의 화소는 2개의 OTFT, 1개의 캐패시터 그리고 1개의 OLED로 구성하였고, 크기는 $2mm{\times}2mm$이며, 해상도는 $16{\times}16$ 이다. 제작된 어레이는 일부 불량 화소를 포함하고 있지만 능동형 모드로 동작함을 확인할 수 있었다.

Inorganic Printable Materials for Printed Electronics: TFT and Photovoltaic Application

  • 정선호;이병석;이지윤;서영희;김예나;;이재수;조예진;최영민;류병환
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2011년도 춘계학술발표대회
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    • pp.1.1-1.1
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    • 2011
  • Printed electronics based on the direct writing of solution processable functional materials have been of paramount interest and importance. In this talk, the synthesis of printable inorganic functional materials (conductors and semiconductors) for thin-film transistors (TFTs) and photovoltaic devices, device fabrication based on a printing technique, and specific characteristics of devices are presented. For printable conductor materials, Ag ink is designed to achieve the long-term dispersion stability and good adhesion property on a glass substrate, and Cu ink is sophisticatedly formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. In addition, the organic thin-film transistor based on the printed metal source/drain electrode exhibits the electrical performance comparable to that of a transistor based on a vacuum deposited Au electrode. For printable amorphous oxide semiconductors (AOSs), I introduce the noble ways to resolve the critical problems, a high processing temperature above $400^{\circ}C$ and low mobility of AOSs annealed at a low temperature below $400^{\circ}C$. The dependency of TFT performances on the chemical structure of AOSs is compared and contrasted to clarify which factor should be considered to realize the low temperature annealed, high performance AOSs. For photovoltaic application, CI(G)S nanoparticle ink for solution processable high performance solar cells is presented. By overcoming the critical drawbacks of conventional solution processed CI(G)S absorber layers, the device quality dense CI(G)S layer is obtained, affording 7.3% efficiency CI(G)S photovoltaic device.

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Gravure Offset 인쇄에 의한 미세 전극용 Ag Paste 개발 (Gravure Offset Printed on Fine Pattern by Developing Electrodes for the Ag Paste)

  • 이상윤;장아람;남수용
    • 한국인쇄학회지
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    • 제30권3호
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    • pp.45-56
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    • 2012
  • Printing technology is accepted by appropriate technology that smart phones, tablet PC, display(LCD, OLED, etc.) precision recently in the electronics industry, the market grows, this process in the ongoing efforts to improve competitiveness through the development of innovative technologies. So printed electronics appeared by new concept. This technology development is applied on electronic components and circuits for the simplification of the production process and reduce processing costs. Low-temperature process making possible for widening, slimmer, lighter, and more flexible, plastic substrates, such as(flexible) easily by forming a thin film on a substrate has been studied. In the past, the formation of the electrode used a screen printing method. But the screen printing method is formation of fine patterns, high-speed printing, mass production is difficult. The roll-to-roll printing method as an alternative to screen printing to produce electronic devices by printing techniques that were used traditionally in the latest technology and processing techniques applied to precision control are very economical to implement fine-line printing equipment has been evaluated as. In order to function as electronic devices, especially the dozens of existing micro-level of non-dot print fine line printing is required, the line should not break at all, because according to the specifications required to fit the ink transfer conditions should be established. In this study of roll-to-roll printing conductive paste suitable for gravure offset printing by developing Ag paste for forming fine patterns to study the basic physical properties with the aim of this study were to.

Prevention of P-i Interface Contamination Using In-situ Plasma Process in Single-chamber VHF-PECVD Process for a-Si:H Solar Cells

  • Han, Seung-Hee;Jeon, Jun-Hong;Choi, Jin-Young;Park, Won-Woong
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.204-205
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    • 2011
  • In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is a most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. For best performance of thin film silicon solar cell, the dopant profiles at p/i and i/n interfaces need to be as sharp as possible. The sharpness of dopant profiles can easily achieved when using multi-chamber PECVD equipment, in which each layer is deposited in separate chamber. However, in a single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of a single-chamber PECVD system in spite of the advantage of lower initial investment cost for the equipment. In order to resolve the cross-contamination problem in single-chamber PECVD systems, flushing method of the chamber with NH3 gas or water vapor after doped layer deposition process has been used. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. A single-chamber VHF-PECVD system was used for superstrate type p-i-n a-Si:H solar cell manufacturing on Asahi-type U FTO glass. A 80 MHz and 20 watts of pulsed RF power was applied to the parallel plate RF cathode at the frequency of 10 kHz and 80% duty ratio. A mixture gas of Ar, H2 and SiH4 was used for i-layer deposition and the deposition pressure was 0.4 Torr. For p and n layer deposition, B2H6 and PH3 was used as doping gas, respectively. The deposition temperature was $250^{\circ}C$ and the total p-i-n layer thickness was about $3500{\AA}$. In order to remove the deposited B inside of the vacuum chamber during p-layer deposition, a high pulsed RF power of about 80 W was applied right after p-layer deposition without SiH4 gas, which is followed by i-layer and n-layer deposition. Finally, Ag was deposited as top electrode. The best initial solar cell efficiency of 9.5 % for test cell area of 0.2 $cm^2$ could be achieved by applying the in-situ plasma cleaning method. The dependence on RF power and treatment time was investigated along with the SIMS analysis of the p-i interface for boron profiles.

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Interface Control to get Higher Efficiency in a-Si:H Solar Cell

  • Han, Seung-Hee;Kim, En-Kyeom;Park, Won-Woong;Moon, Sun-Woo;Kim, Kyung-Hun;Kim, Sung-Min
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.193-193
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    • 2012
  • In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is the most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. Single-chamber PECVD system for a-Si:H solar cell manufacturing has the advantage of lower initial investment and maintenance cost for the equipment. However, in single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of single-chamber PECVD system. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. In order to remove the deposited B inside of the plasma chamber during p-layer deposition, a high RF power was applied right after p-layer deposition with SiH4 gas off, which is then followed by i-layer, n-layer, and Ag top-electrode deposition without vacuum break. In addition to the p-i interface control, various interface control techniques such as FTO-glass pre-annealing in O2 environment to further reduce sheet resistance of FTO-glass, thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, and hydrogen plasma treatment prior to n-layer deposition, etc. were developed. The best initial solar cell efficiency using single-chamber PECVD system of 10.5% for test cell area of 0.2 $cm^2$ could be achieved by adopting various interface control methods.

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유기물 광전소자 제작을 위한 박스 캐소드 스퍼터 기술 (Box Cathode Sputtering Technologies for Organic-based Optoelectronics)

  • 김한기
    • 한국전기전자재료학회논문지
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    • 제19권4호
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    • pp.373-378
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    • 2006
  • We report on plasma damage free-sputtering technologies for organic light emitting diodes (OLEDs), organic thin film transistor (OTFT) and flexible displays by using a box cathode sputtering (BCS) method. Specially designed BCS system has two facing targets generating high magnetic fields ideally entering and leaving the targets, perpendicularly. This target geometry allows the formation of high-density plasma between targets and enables us to realize plasma damage free sputtering on organic layer without protection layer against plasma. The OLED with Al cathode prepared by BCS shows electrical and optical characteristics comparable to OLED with thermally evaporated Mg-Ag cathode. It was found that OLED with Al cathode layer prepared by BCS has much lower leakage current density ($1{\times}10^{-5}\;mA/cm^2$ at -6 V) than that $(1{\times}10^{-2}{\sim}-10^0\;mA/cm^2)$ of OLED prepared by conventional DC sputtering system. This indicates that BCS technique is a promising electrode deposition method for substituting conventional thermal evaporation and DC/RF sputtering in fabrication process of organic based optoelectronics.

Organic Thin-Film Transistors Fabricated on Flexible Substrate by Using Nanotransfer Molding

  • Hwang, Jae-Kwon;Dang, Jeong-Mi;Sung, Myung-Mo
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2010년도 제39회 하계학술대회 초록집
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    • pp.287-287
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    • 2010
  • We report a new direct patterning method, called liquid bridge-mediated nanotransfer molding (LB-nTM), for the formation of two- or three-dimensional structures with feature sizes between tens of nanometers and tens of micron over large areas. LB-nTM is based on the direct transfer of various materials from a mold to a substrate via a liquid bridge between them. This procedure can be adopted for automated direct printing machines that generate patterns of functional materials with a wide range of feature sizes on diverse substrates. Arrays of TIPS-PEN TFTs were fabricated on 4" polyethersulfone (PES) substrates by LB-nTM using PDMS molds. An inverted staggered structure was employed in the TFT device fabrication. A 150 nm-thick indium-tin oxide (ITO) gate electrode and a 200 nm-thick SiO2dielectric layer were formed on a PES substrate by sputter deposition. An array of TIPS-PEN patterns (thickness: 60 nm) as active channel layers was fabricated on the substrate by LB-nTM. The nominal channel length of the TIPS-PEN TFT was 10 mm, while the channel width was 135 mm. Finally, the source and drain electrodes of 200 nm-thick Ag were defined on the substrate by LB-nTM. The TIPS-PEN TFTs can endure strenuous bending and are also transparent in the visible range, and therefore potentially useful for flexible and invisible electronics.

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담수 및 퇴적물에 함유된 아연, 카드뮴, 납 및 구리의 산화전극 벗김 전압전류법 정량 (Anodic Stripping Voltammetric Determinations of Zinc, Cadmium, Lead and Copper in Freshwater and Sediment)

  • 한영희;유정연
    • 대한화학회지
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    • 제41권4호
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    • pp.180-185
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    • 1997
  • 매달린 수은 방울 전극(HMDE) 또는 얇은 수은막 전극(TMFE)을 사용하여 금속이온들을 은/염화은(포화 KCl) 기준전극에 대하여 -1,200 V에서 150초 동안 전해시켜서 수은전극에 농축시키고 펄스 차이 전압전류법(DPASV)과 네모파 전압전류법(SWASV)으로 산화전극 벗김 분석을 하여 동시에 아연, 카드뮴, 납 및 구리를 정량분석하였다. HMDE를 사용하여 DPASV로 네 가지 금속이온을 동시 정량분석시 각각의 금속이온의 봉우리 전류는 20~100 ppb 농도범위에서 직선성을 보여주었으나 TMFE를 사용하여 DPASV 또는 SWASV로 네 가지 금속이온을 동시 정량분석시에는 $Cd^{2+}$$Pb^{2+}$의 봉우리 전류만 DPASV의 경우 100 ppb까지 SWASV의 경우 10 ppb까지 직선성을 나타내었다. $Cd^{2+}$$Pb^{2+}$의 동시 정량분석의 경우 TMFE를 사용한 DPASV 분석은 HMDE를 사용한 DPASV보다 약 15배 더 민감하였으며 TMFE에서 SWASV는 DPASV보다 약 5배 더 민감하였다. 퇴적물에 함유된 아연의 농도를 HMDE를 사용한 DPASV 분석법과 유도 결합 플라스마-질량분석법으로 일곱개의 시료에 대하여 정량분석하여 비교하였더니 상관계수가 0.9993으로 높았고 t-test결과 두 방법 사이에는 유의성 있는 차이가 없었다.

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