• Journal of the Korean Magnetics Society
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• v.26 no.6
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• pp.201-205
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• 2016

In this report, we measured the impedance spectrum in TMR device, and the relaxation behavior of the real and imaginary impedance spectrum was analyzed by using the equilibrant circuit of tunneling capacitance ($C_T$) and tunneling resistance ($R_T$). The relaxation frequency was increased with AC voltage in both the parallel and antiparallel alignment of two magnetic layers. The $R_T$ with AC voltage showed the typical bias voltage dependence. However, the $C_T$ showed large value than the expected geometrical capacitance. The huge increase of $C_T$ was affecting as a limiting factor for the high speed operation of TMR devices. Thus, the supercapacitance of $C_T$ should be considered to design the high speed TMR devices.

• Journal of the Korean Magnetics Society
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• v.12 no.5
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• pp.168-173
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• 2002

Electrostatic discharge characteristics were studied by connecting human body model (HBM) with tunneling magnetoresistance (TMR) device in this research. TMR samples were converted into electrical equivalent circuit with HBM and it was simulated utilizing PSPICE. Discharge characteristics were observed by changing the component values of the junction model in this equivalent circuit. The results show that resistance and capacitance of the TMR junction were determinative components that dominate the sensitivity of the electrostatic discharge(ESD). Reducing the resistance oi the junction area and lead line is more profitable to increase the recording density rather than increasing the capacitance to improve the endurance for ESD events. Endurance at DC state was performed by checking breakdown and failure voltages for applied DC voltage. HBM voltage that a TMR device could endure was estimated when the DC failure voltage was regarded as the HBM failure voltage.

• Journal of Magnetics
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• v.14 no.1
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• pp.11-14
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• 2009

We investigated the I-V curves and differential tunneling conductance of two, CoFeB/MgO/CoFeB-based, magnetic tunnel junctions (MTJs): one with a low tunneling magnetoresistance (TMR; 22%) and the other with a high TMR (352%). This huge TMR difference was achieved by different MgO sputter conditions rather than by different annealing or deposition temperature. In addition to the TMR difference, the junction resistances were much higher in the low-TMR MTJ than in the high-TMR MTJ. The low-TMR MTJ showed a clear parabolic behavior in the dI/dV-V curve. This high resistance and parabolic behavior were well explained by the Simmons' simple barrier model. However, the tunneling properties of the high-TMR MTJ could not be explained by this model. The characteristic tunneling properties of the high-TMR MTJ were a relatively low junction resistance, a linear relation in the I-V curve, and conduction dips in the differential tunneling conductance. We explained these features by applying the coherent tunneling model.

• Proceedings of the KSR Conference
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• 2000.05a
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• pp.336-343
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• 2000

This paper proposes the failsafe control logic. which has applied to the voting on the TMR system by using FPGA The self-detection circuit is also designed for detecting a characteristic of fault at TMR system. The fault producing in the self-detection system is largely classified among an intermittent fault, a transient fault and a permanent fault. If it is happened to the permanent fault, the system can be failed. Therefore, it is designed the logic circuit which is not transferred the permanent fault to the system after shut off output. The control logic of the Fail Safe proposed in the paper is required for a circuit integrate of device to minimize the failure happened. Therefore, it makes to design FPGA with modeling of VHDL. The circuit of the Fail Safe of TMR system is able to apply to nuclear system, rail-way system, aerospace and aircraft system which is required for high reliability.

• Proceedings of the Korean Magnestics Society Conference
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• 2006.06a
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• pp.14-15
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• 2006

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.373-379
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• 2002

We investigated the evolution of magnetoresistance and magnetic property of tunneling magnetoresistive(TMR) device with microstructure and plasma oxidation time. TMR devices have potential applications for non volatile MRAM and high density HDD reading head. We prepared the tunnel magnetoresistance(TMR) devices of Ta($50{\AA}$)/NiFe($50{\AA}$)/IrMn($150{\AA}$)/CoFe($50{\AA}$)/Al($13{\AA}$)-O/CoFe($40{\AA}$)/FiFe($400{\AA}$)/Ta(($50{\AA}$) structure which have $100{\times}100\mu\textrm{m}^2$ junction area on $2.5{\times}2.5\textrm{cm}^2$ Si/$SiO_2$(($1000{\AA}$) substrates by an inductively coupled plasma(ICP) magnetron sputter. We fabricated the insulating layer using an ICP plasma oxidation method by with various oxidation time from 30 sec to 360 sec, and measured resistances and magnetoresistance(MR) ratios of TMR devices. We found that the oxidized sample for oxidation time of 80 sec showed the highest MR radio of 30.31 %, while the calculated value regarding inhomogeneous current effect indicated 25.18 %. We used transmission electron microscope(TEM) to investigate microstructural evolution of insulating layer. Comparing the cross-sectional TEM images at oxidation time of 150 sec and 360 sec, we found that the thickness and thickness variation of 360 sec-oxidized insulating layer became 30% and 40% larger than those of 150 sec-oxidized layer, repectively. Therefore, our results imply that increase of thickness variation with oxidation time may be one of the major treasons of the MR decrease.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1024-1026
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• 2004

We have developed the five mask $PMOS^1$ and the six mask CMOS process architecture for poly-Si TFT. In order to have a competitive process with that for a-Si TFT, the simple co-planar electrode structure whose data line electrode and pixel electrode are on the same plane was adopted. In addition, RGB + White four color $technology^2$ were applied to achieve high aperture ratio and transmittance. Using the aforementioned process architecture and four color technology, 2.0 inch qCIF transmissive micro-reflectance (TMR) device was successfully fabricated.

• Proceedings of the Korean Magnestics Society Conference
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• 2008.12a
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• pp.139.2-139.2
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• 2008

• Journal of the Korean Magnetics Society
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• v.12 no.3
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• pp.99-102
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• 2002

We fabricated TMR devices which have doubly oxidized tunnel barrier using plasma oxidation method to form homogeneously oxidized AlO tunnel barrier. We sputtered 10 $\AA$-bottom Al layer and oxidized it with oxidation time of 10 sec. Subsequent sputtering of 13 $\AA$-Al was performed and the metallic layer was oxidized for 50, 80, and 120 sec., respectively. The electrical resistance changed from 500 Ω to 2000 Ω with increase of oxidation time, while variation of MR ratio was little spreading 27∼31 % which is larger than that of TMR device of ordinary single tunnel barrier. We calculated effective barrier height and width by measuring I-V curves, from which we found the barrier height was 1.3∼1.8 eV sufficient for tunnel barrier, and the barrier width (<15.0 $\AA$) was smaller than physical thickness. Our results may be caused by insufficient oxidation of Al precursor into A1$_2$O$_3$. However, doubly oxidized tunnel barriers were superior to conventional single tunnel barrier in uniformity and density. Our results imply that we were able to improve MR ratio and tune resistance by employing doubly oxidized tunnel barrier process.

• Proceedings of the Korean Magnestics Society Conference
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• 2002.12a
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• pp.72-73
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• 2002

MR(Magnetoresistance)현상이란 인가된 자장에 의해 저항이 변하는 현상이다. 이 현상은 여러 측면에서 연구되고 있고 그 중 TMR(Tunneling Magnetoresistance)현상은 sensor, head, memory device의 적용에 대한 연구가 진행 중에 있다. 특히 memory 소자 측면에서 MRAM은 현재 사용되고 있는 DRAM이나 SRAM들과는 달리 비휘발성과 기록밀도의 고집적 등 많은 장점을 갖는 소자로써 연구되고 있다. (중략)