• Title/Summary/Keyword: TFT substrate

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Enhanced Device Performance of IZO-based oxide-TFTs with Co-sputtered $HfO_2-Al_2O_3$ Gate Dielectrics (Co-sputtered $HfO_2-Al_2O_3$을 게이트 절연막으로 적용한 IZO 기반 Oxide-TFT 소자의 성능 향상)

  • Son, Hee-Geon;Yang, Jung-Il;Cho, Dong-Kyu;Woo, Sang-Hyun;Lee, Dong-Hee;Yi, Moon-Suk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.6
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    • pp.1-6
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    • 2011
  • A transparent oxide thin film transistors (Transparent Oxide-TFT) have been fabricated by RF magnetron sputtering at room temperature using amorphous indium zinc oxide (a-IZO) as both of active channel and source/drain, gate electrodes and co-sputtered $HfO_2-Al_2O_3$ (HfAIO) as gate dielectric. In spite of its high dielectric constant > 20), $HfO_2$ has some drawbacks including high leakage current and rough surface morphologies originated from small energy band gap (5.31eV) and microcrystalline structure. In this work, the incorporation of $Al_2O_3$ into $HfO_2$ was obtained by co-sputtering of $HfO_2$ and $Al_2O_3$ without any intentional substrate heating and its structural and electrical properties were investigated by x-ray diffraction (XRD), atomic force microscopy (AFM) and spectroscopic ellipsometer (SE) analyses. The XRD studies confirmed that the microcrystalline structures of $HfO_2$ were transformed to amorphous structures of HfAIO. By AFM analysis, HfAIO films (0.490nm) were considerably smoother than $HfO_2$ films (2.979nm) due to their amorphous structure. The energy band gap ($E_g$) deduced by spectroscopic ellipsometer was increased from 5.17eV ($HfO_2$) to 5.42eV (HfAIO). The electrical performances of TFTs which are made of well-controlled active/electrode IZO materials and co-sputtered HfAIO dielectric material, exhibited a field effect mobility of more than $10cm^2/V{\cdot}s$, a threshold voltage of ~2 V, an $I_{on/off}$ ratio of > $10^5$, and a max on-current of > 2 mA.

The Effect of Geometric Shape of Amorphous Silicon on the MILC Growth Rate (MILC 성장 속도에 비정질 실리콘의 기하학적 형상이 미치는 영향)

  • Kim Young-Su;Kim Min-Sun;Joo Seung-Ki
    • Korean Journal of Materials Research
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    • v.14 no.7
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    • pp.477-481
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    • 2004
  • High quality polycrystalline silicon is very critical part of the high quality thin film transistor(TFT) for display devices. Metal induced lateral crystallization(MILC) is one of the most successful technologies to crystallize the amorphous silicon at low temperature(below $550^{\circ}C$) and uses conventional and large glass substrate. In this study, we observed that the MILC behavior changed with abrupt variation of the amorphous silicon active pattern width. We explained these phenomena with the novel MILC mechanism model. The 10 nm thick Ni layers were deposited on the glass substrate having various amorphous silicon patterns. Then, we annealed the sample at $550^{\circ}C$ with rapid thermal annealing(RTA) apparatus and measured the crystallized length by optical microscope. When MILC progress from narrow-width-area(the width was $w_2$) to wide-width-area(the width was $w_1$), the MILC rate decreased dramatically and was not changed for several hours(incubation time). Also the incubation time increased as the ratio, $w_1/w_2$, get larger. We can explain these phenomena with the tensile stress that was caused by volume shrinkage due to the phase transformation from amorphous silicon to crystalline silicon.

Synthesis and Characterization of Layer-Patterned Graphene on Ni/Cu Substrate

  • Jung, Daesung;Song, Wooseok;Lee, Seung Youb;Kim, Yooseok;Cha, Myoung-Jun;Cho, Jumi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.618-618
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    • 2013
  • Graphene is only one atom thick planar sheet of sp2-bonded carbon atoms arranged in a honeycomb crystal lattice, which has flexible and transparent characteristics with extremely high mobility. These noteworthy properties of graphene have given various applicable opportunities as electrode and/or channel for various flexible devices via suitable physical and chemical modifications. In this work, for the development of all-graphene devices, we performed to synthesize alternately patterned structure of mono- and multi-layer graphene by using the patterned Ni film on Cu foil, having much different carbon solid solubilities. Depending on the process temperature, Ni film thickness, introducing occasion of methane and gas ratio of CH4/H2, the thickness and width of the multi-layer graphene were considerably changed, while the formation of monolayer graphene on just Cu foil was not seriously influenced. Based on the alternately patterned structure of mono- and multi-layer graphene as a channel and electrode, respectively, the flexible TFT (thin film transistor) on SiO2/Si substrate was fabricated by simple transfer and O2 plasma etching process, and the I-V characteristics were measured. As comparing the change of resistance for bending radius and the stability for a various number of repeated bending, we could confirm that multi-layer graphene electrode is better than Au/Ti electrode for flexible applications.

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Copper, aluminum based metallization for display applications (표시소자 응용을 위한 copper, aluminum 박막의 성장과 특성)

  • 김형택;배선기
    • Electrical & Electronic Materials
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    • v.8 no.3
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    • pp.340-351
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    • 1995
  • Electrical, physical and optical properties of Aluminum(Al), Copper(Cu) thin films were investigated in order to establish the optimum sputtering parameters in Liquid Crystal Display (LCD) panel applications. DC-magnetron sputtered film on coming 7059 samples were fabricated with variations of deposition power densities, deposition pressures and substrate temperatures. Low resistivity films(AI;2.80 .mu..ohm.-cm, Cu:1.84 .mu..ohm-cm),which lower than the reported values, were obtained under sputtering parameters of power density(250W), substrate temperature(450-530.deg. C) and 5*10$\^$-3/ Torr deposition pressure. Expected columnar growth and stable grain growth of both films was observed through the Scanning Electron Microscope(SEM) micrographs. Dependency of the applicable defect-free film density upon depositon power and temperature was also characterized. Not too noticable variations in X-ray diffraction patterns were remarked under the alterations of sputtering parameters. High optical reflectivities of Al, Cu films, approximately 70-90 %, showed high degree of surface flatness.

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Atmospheric Pressure Plasma를 이용한 Oxide Thin Film Transistor의 특성 개선 연구

  • Mun, Mu-Gyeom;Kim, Ga-Yeong;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.582-582
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    • 2013
  • Oxide TFT (thin film transistor) active channel layer에 대한 저온 열처리 공정은 투명하고 flexibility을 기반으로하는 display 산업과 AMOLED (active matrix organic light emitting diode) 분야 등 다양한 분야에서 필요로 하는 기술로서 많은 연구가 이루어지고 있다. 과거 active layer는 ALD (atomic layer deposition), CVD (chemical vapor deposition), pulse laser deposition, radio frequency-dc (RF-dc) magnetron sputtering 등과 같은 고가의 진공 장비를 이용하여 증착 되어져 왔으나 현재에는 진공 장비 없이 spin-coating 후 열처리 하는 저가의 공정이 주로 연구되어 지고 있다. Flexible 기판들은 일반적인 OTFT (oxide thin films Transistor)에 적용되는 열처리 온도로 공정 진행시 열에 의한 기판의 손상이 발생한다. Flexible substrate의 열에 의한 기판 손상을 막기 위해 저온 열처리 공정이 연구되고 있지만 기존 열처리와 비교하여 소자의 특성 저하가 동반 되었다. 본 연구에서는 Si 기판위에 SiO2 (100)를 절연층으로 증착하고 그 위에 IZO (indium zinc oxide) solution을 spin-coating 한뒤 $250^{\circ}C$ 이하의 온도에서 열처리하였다. 저온 공정으로 인하여 소자의 특성 저하가 동반 되었으므로 소자의 저하된 특성 복원하고자 post-treatment로 고가의 진공장비가 필요 없고 roll-to roll system 적용이 수월한 remote-type의 APP (atmospheric pressure plasma) 처리를 하였다. Post-treatment로 APP를 이용하여 $250^{\circ}C$ 이하에서 소자에 적용 가능한 on/off ratio를 얻을 수 있었다.

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Novel deposition technology for nano-crystalline silicon thin film at low temperature by hyper-thermal neutral beam assisted CVD system

  • Jang, Jin-Nyoung;Song, Byoung-Chul;Oh, Kyoung-Suk;Yoo, Suk-Jae;Lee, Bon-Ju;Choi, Soung-Woong;Park, Young-Chun;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1025-1027
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    • 2009
  • Novel low temperature deposition process for nano-crystalline Si thin film is developed with the hyper-thermal neutral beam (HNB) technology. By our HNB assisted CVD system, the reactive particles can induce crystalline phase in Si thin films and effectively combine with heating effect on substrate. At low deposition temperature under $80^{\circ}C$, the HNB with proper incident energy controlled by the reflector bias can effectively enhance the nano-crystalline formation in Si thin film without any additional process. The electrical properties of Si thin films can be varied from a-Si to nc-Si according to change of HNB energy and substrate temperature. Characterization of these thin films with conductivity reveal that crystalline of Si thin film can increase by assist of HNB with appropriate energy during low temperature deposition. And low temperature prcoessed nc-Si TFT performance has on-off ratio as order 5.

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Property of Nickel Silicides with 10 nm-thick Ni/Amorphous Silicon Layers using Low Temperature Process (10 nm-Ni 층과 비정질 실리콘층으로 제조된 저온공정 나노급 니켈실리사이드의 물성 변화)

  • Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.47 no.5
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    • pp.322-329
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    • 2009
  • 60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.

Flexible Active-Matrix Electrophoretic Display With Integrated Scan-And Data-Drivers

  • Miyazaki, Atsushi;Kawai, Hideyuki;Miyasaka, Mitsutoshi;Inoue, Satoshi;Shimoda, Tatsuya
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.153-156
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    • 2004
  • A newly developed flexible active-matrix (AM-) electrophoretic display (EPD) is reported. The AM-EPD features: (1) low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology, (2) fully integrated scan- and data-drivers, (3) flexibility and light-weight realized by transferring the whole circuits onto a plastic substrate using $SUFTLA^{TM}$ (Surface Free Technology by Laser Annealing/Ablation) process. A large storage capacitor is formed in each pixel so that driving electric field can be kept sufficiently strong during a writing period Two-phase driving scheme, a reset-phase which erases a previous image and a writing-phase for writing a new image, was chosen to cope with EPD's high driving voltage. The flexible AM-EPD has been successfully operated with a driving voltage of 8.5 V.

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3.5-Inch QCIF AMOLED Panels with Ultra-low-Temperature Polycrystalline Silicon Thin Film Transistor on Plastic Substrate

  • Kim, Yong-Hae;Chung, Choong-Heui;Moon, Jae-Hyun;Lee, Su-Jae;Kim, Gi-Heon;Song, Yoon-Ho
    • ETRI Journal
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    • v.30 no.2
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    • pp.308-314
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    • 2008
  • In this paper, we describe the fabrication of 3.5-inch QCIF active matrix organic light emitting display (AMOLED) panels driven by thin film transistors, which are produced by an ultra-low-temperature polycrystalline silicon process on plastic substrates. The over all processing scheme and technical details are discussed from the viewpoint of mechanical stability and display performance. New ideas, such as a new triple-layered metal gate structure to lower leakage current and organic layers for electrical passivation and stress reduction are highlighted. The operation of a 3.5-inch QCIF AMOLED is also demonstrated.

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Circuit Design Technologies for System on Panel

  • Park, Yong-Sung;Kim, Do-Youb;Kim, Keum-Nam;Matsueda, Yojiro;Kim, Hye-Dong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1081-1084
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    • 2007
  • System on Panel (SOP) can integrate many functions by Thin Film Transistor (TFT) circuits on an insulator substrate without using external driver LSIs. However, to make practical SOP has become more and more difficult because of rapid cost reduction of the driver LSIs. This paper will review the circuit design technology trend for SOP and introduce an example of a practical SOP, 2.0inch QVGA full color active matrix OLED with 8bit source driver.

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