• Title/Summary/Keyword: SystemC

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Development of GPS Baseband Chip (GPS Baseband Chip 개발)

  • Cho, Jae-Bum;Lee, Tae-Hyoung;Lee, Yoon-Jick;Heo, Jung-Hun;Jung, Hwi-Sung;Jeong, Jun-Young;Yoon, Suk-Ki;Kim, Hak-Soo;Cho, Dong-Sik;Choi, Hoon-Soon
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2313-2315
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    • 2003
  • This paper presents the development methods which Samsung GPS baseband chip is called S3E4510X. Specification of S3E4510X and design methodology of baseband architecture is presented with a study of their effects. Also GPS core block and software are described in detail. We designed and implemented the test board with RF module for evaluating performance via static test dynamic test and each performance factors using live signal and CPS simulator. Test results show that our development GPS baseband chip have effectively performance for mobile handset Location Based Service (LBS) and its practical use for navigation.

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Modulation of Cyclic AMP-PKA System on Inhibitory and Excitatory Herbs-induced Ion Currents (Cyclic AMP-PKA System이 억제성 및 흥분성 한약재에 의해 유발된 이온전류에 미치는 영향)

  • Kim Youn-Jung;Shin Min-Chul;Chung Joo-Ho;Lee Choong-Yeol;Kim Ee-Hwa;Kim Chang-Ju
    • Korean Journal of Acupuncture
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    • v.18 no.1
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    • pp.143-156
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    • 2001
  • Modulatory effect of cAMP-PKA system on inhibitory- and excitatory herbs-induced ion currents were investigated by nystatin-perforated patch clamp method under voltage-clamp condition. Ion currents induced by Bupleuri radix and Coptidis rhizoma were not affected by cAMP-PKA system. Ion current induced by Ecliptae herba was partially inhibited by cAMP-PKA system. Ion currents induced by Aconiti tuber and Boshniakiae herba were inhibitory modulated and ion current induced by Zingiberis rhizoma was excitatory modulated by cAMP-PKA system. Modulation of cAMP-PKA system on ion currents induced by Ginseng radix was fluctuated. In this results, it can be seen generally that excitatory herbs-induced ion currents were modulated by cAMP-PKA system while cAMP-PKA system did not affect inhibitory herbs-induced ion currents.

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ViP: A Practical Approach to Platform-based System Modeling Methodology

  • Um, Jun-Hyung;Hong, Sung-Pack;Kim, Young-Taek;Chung, Eui-Young;Choi, Kyu-Myung;Kong, Jeong-Taek;Eo, Soo-Kwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.2
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    • pp.89-101
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    • 2005
  • Research on highly abstracted system modeling and simulation has received a great deal of attention as of the concept of platform based design is becoming ubiquitous. From a practical design point of view, such modeling and simulation must consider the following: (i) fast simulation speed and cycle accuracy, (ii) early availability for early stage software development, (iii) inter-operability with external tools for software development, and (iv) reusability of the models. Unfortunately, however, all of the previous works only partially addresses the requirements, due to the inherent conflicts among the requirements. The objective of this study is to develop a new system design methodology to effectively address the requirements mentioned above. We propose a new transaction-level system modeling methodology, called ViP (Virtual Platform). We propose a two-step approach in the ViP method. In phase 1, we create a ViP for early stage software development (before RTL freeze). The ViP created in this step provides high speed simulation, lower cycle accuracy with only minor modeling effort.(satisfying (ii)). In phase 2, we refine the ViP to increase the cycle accuracy for system performance analysis and software optimization (satisfying (i)). We also propose a systematic ViP modeling flow and unified interface scheme based on utilities developed for maximizing reusability and productivity (satisfying (ii) and (iv)) and finally, we demonstrate VChannel, a generic scheme to provide a connection between the ViP and the host-resident application software (satisfying (iii)). ViP had been applied to several System-on-a-chip (SoC) designs including mobile applications, enabling engineers to improve performance while reducing the software development time by 30% compared to traditional methods.

Studies on the Transmission Performance of Opencable and CVB-C (Opencable 방식과 DVB-C 방식의 전송성능에 관한 연구)

  • Lee, Jae-Ryun;Sohn, Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.2C
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    • pp.184-190
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    • 2002
  • This paper compares and analyzes and analyzes the transmission performance of the OpenCable system and the DBD-C system which are adopted as the digital CATV transmission standard in U.S.A. and Europe respectively through computer simulation under the same channel environment. We considered the channel environment including the random noise and the CTB (Composite Tripple Beats) noise as channel impairments in order to compare the two standard fairly. Additionally, we analyzed the transmission performance of the OpenCable system for the various interleaving depths. We implemented each transmission system by software, and we analyzed BER values with respect to the C/N in order to compare their transmission performance. As a result of the computer simulation, to get the BER of ${10}^{-6}$ the OpenCable system requires 1.2 dB kiwer C/N than the DVB-C system in the 64-QAM mode, and the two system require similar C/N in the 256-QAM mode.

A SOC Design Methodology using SystemC (SystemC를 이용한 SOC 설계 방법)

  • 홍진석;김주선;배점한
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.153-156
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    • 2000
  • This paper presents a SOC design methodology using the newly-emerging SystemC. The suggested methodology firstly uses SystemC to define blocks from the previously-developed system level algorithm with internal behavior and interface being separated and validate such a described blocks' functionality when integrated. Next, the partitioning between software and hardware is considered. With software, the interface to hardware is described cycle-accurate and the other internal behavior in conventional ways. With hardware, I/O transactions are refined gradually in several abstraction levels and internal behavior described on a function basis. Once hardware and software have been completed functionally, system performance analysis is performed on the built model with assumed performance factors and influences such decisions regressively as on optimum algorithm selection, partitioning and etc. The analysis then gives constraint information when hardware description undergoes scheduling and fixed-point trans- formation with the help of automatic translation tools or manually. The methodology enables C/C++ program developers and VHDL/Verilog users to migrate quickly to a co-design & co-verification environment and is suitable for SoC development at a low cost.

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The Circuit Design and Analysis of the Digital Delay-Lock Loop in GPS Receiver System (GPS 수신 시스템에서 디지탈 지연동기 루프 회로 설계 및 분석)

  • 금홍식;정은택;이상곤;권태환;유흥균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.8
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    • pp.1464-1474
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    • 1994
  • GPS(Global Positioning System)is a satellite-based navigation system that we can survey where we are, anywhere and anytime. In this paper, delay-lock loop of the receiver which detects the navigation data is theoretically analyzed, and designed using the digital logic circuit. Also logic operations for the synchronization are analyzed. The designed system consists of the correlator which correlates the received C/A code and the generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock syntheizer which generates the clock of the C/A code generator to control the C/A code phase and clock rate. From the analyses results of the proposed digital delay-lock loop system, the system has the detection propertied over 90% when its input signal power is above-113.98dB. The influence of input signal variation of digital delay loop, which is the input of A/D converter, is investigated and the performance is analyzed with the variation of threshold level via the computer simulation. The logic simulation results show that the designed system detects precisely the GPS navigation data.

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An Analysis of the Time-Lag Effects on the Investment of G4C E-Government System by analysing DB Data (운영 DB데이터 분석을 통한 G4C 전자정부 정보화 사업 투자 시차효과 분석)

  • Cho, Nam-Jae;Lim, Gyoo-Gun;Lee, Dae-Chul
    • Journal of Information Technology Applications and Management
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    • v.16 no.4
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    • pp.205-222
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    • 2009
  • Considering time-lag in the performance evaluation of information system (IS) investment is important because its effect reveals after certain period of time passed. Particularly it is more in the systems of e-government informatization projects which the amount of investment and the scale of business are huge. Many methods to solve this issue have been proposed such as system dynamics methods, simulations, structural equations etc. However, it is still difficult and unsolved problem because collecting practical data for time-lag analysis is very hard. In this paper, we analyze IS time-lag effect through factor analysis using the accumulated practical operational DB data. For the performance evaluation of the G4C system, the representative e-government web portal, we selected eleven factors reflecting time passing in G4C DB data. With these factors this paper conduct time-lag analysis in four view points. First, we conducted 'Stabilizing of G4C system' and got a result that IS is needed about three years for the stabilization. Second, we conducted 'Utilization of G4C system' and got a result that the utilization reaches appropriate level after in three years later after the introduction of G4C system. Third, we conducted 'Cost reduction effect' and got a result that cost reduction is stable in the third year after the introduction of G4C system. Lastly, we conducted 'System maturity effect' and got a result that the system reaches to the quality level that users expect after third to fourth years. According to the results of this research, we found that performance of IS improv continuously not immediately, and it needs three or four years of time-lag.

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A Study on the Reduction of HC and Heat Characteristics of the Dual Pipe Exhaust Manifold (이중관 배기메니폴드의 HC저감효과 및 열특성에 관한 연구)

  • 박경석;허형석
    • Transactions of the Korean Society of Automotive Engineers
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    • v.9 no.6
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    • pp.103-111
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    • 2001
  • During cold-start period, the reduction of exhaust emissions is a challenging task. To decrease harmful gaseous substances such as HC, it is necessary to realize a fast catalyst warm-up. In this study, the performance of dual pipe exhaust system have been carried out through different test mode. From measurement of gas temperature and HC concentration, the following conclusions were derived ; 1) Compared with single pipe, dual pipe exhaust system remarkably increase temperature of exhaust gas going through M.C.C(Main Catalytic Converter). 2) W.C.C.(Warm-up Catalytic Converter) also decreases HC emission. To reduce HC emission, it is helpful to use W.C.C. as well as dual pipe exhaust system. 3) Using finite element method, it is shown that inner parts have much higher distribution of temperature than outer parts.

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Screening and Analysis for cTPx II-Interacting Protein Using Yeast Wo-hybrid System (Yeast Two-hybrid System을 이용한 cTPx II 결합단백질 탐색 및 분석)

  • Kim. Il-Han;Oh, Young-Mee;Cha, Mee-Kyung
    • The Journal of Natural Sciences
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    • v.15 no.1
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    • pp.79-88
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    • 2005
  • There are five isoforms of thiol peroxidase in yeast. Each isoform was named after its subcellular localization such as cytoplasmic TPx I, cTPx II, cTPx III, mitochondrial TPx (mTPx), and nuclear TPx (nTPx). Recently, we reported that unlike other TPx null mutants, cTPx IInull mutant showed a slow-growth phenotype. This observation suggests that cTPx II might be involved in yeast cell growth. In this study, for a first step toward to investigate the physiological function of cTPx II in yeast, we have identified a novel interaction between cTPx II and various proteins by using the yeast two-hybrid system.

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Studies on the Biological Function and Antibacterial Effect of Lactoperoxidase System in Milk (우유내의 LP system의 생리기능 및 항균성에 관한여구 1. Escherichia coli O157:H7에 대한 항균효과)

  • 정충일;남은숙;김대원;전형일
    • Journal of Food Hygiene and Safety
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    • v.13 no.1
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    • pp.1-5
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    • 1998
  • This study was carried out to measure the antibacterial effect of lactoperoxidase/ thiocyanate/hydrogen peroxide system (LP system) against E. coli 0157:H7. When the initial inoculum levels (($10^{2},\;10^{4},\;10^{7}cfu/ml$), concentration of LP (10 ppm, 20 ppm, 30 ppm), culture media (TSB-YE, UHT milk, raw milk) and storage temperatures ($5^{\circ}C,\;10^{\circ}C,$15$^{\circ}C$) were set up differently for the experiment and the antibacterial effect was compared, the highest antibacterial effect of LP system was shown at $10^{2}cfu/ml$ of initial inoculum level, 10 ppm of LP concentration and $5^{\circ}C$ of incubation temperature.

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